[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20200626154941.GA6611@BV030612LT>
Date: Fri, 26 Jun 2020 18:49:41 +0300
From: Cristian Ciocaltea <cristian.ciocaltea@...il.com>
To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Cc: Stephen Boyd <sboyd@...nel.org>,
Andreas Färber <afaerber@...e.de>,
Rob Herring <robh+dt@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
linux-actions@...ts.infradead.org
Subject: Re: [PATCH v2 1/6] clk: actions: Fix h_clk for Actions S500 SoC
On Fri, Jun 26, 2020 at 07:15:41PM +0530, Manivannan Sadhasivam wrote:
> On Wed, Jun 24, 2020 at 08:47:52PM +0300, Cristian Ciocaltea wrote:
> > The h_clk clock in the Actions Semi S500 SoC clock driver has an
> > invalid parent. Replace with the correct one.
> >
> > Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@...il.com>
>
> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
>
> You should add fixes tag for this patch and it needs to be backported as well.
>
> Thanks,
> Mani
Right, I added the tag:
Fixes: ed6b4795ece4 ("clk: actions: Add clock driver for S500 SoC")
Thanks,
Cristi
>
> > ---
> > drivers/clk/actions/owl-s500.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/clk/actions/owl-s500.c b/drivers/clk/actions/owl-s500.c
> > index e2007ac4d235..0eb83a0b70bc 100644
> > --- a/drivers/clk/actions/owl-s500.c
> > +++ b/drivers/clk/actions/owl-s500.c
> > @@ -183,7 +183,7 @@ static OWL_GATE(timer_clk, "timer_clk", "hosc", CMU_DEVCLKEN1, 27, 0, 0);
> > static OWL_GATE(hdmi_clk, "hdmi_clk", "hosc", CMU_DEVCLKEN1, 3, 0, 0);
> >
> > /* divider clocks */
> > -static OWL_DIVIDER(h_clk, "h_clk", "ahbprevdiv_clk", CMU_BUSCLK1, 12, 2, NULL, 0, 0);
> > +static OWL_DIVIDER(h_clk, "h_clk", "ahbprediv_clk", CMU_BUSCLK1, 12, 2, NULL, 0, 0);
> > static OWL_DIVIDER(rmii_ref_clk, "rmii_ref_clk", "ethernet_pll_clk", CMU_ETHERNETPLL, 1, 1, rmii_ref_div_table, 0, 0);
> >
> > /* factor clocks */
> > --
> > 2.27.0
> >
Powered by blists - more mailing lists