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Message-ID: <20200629215124.GD27967@Asurada-Nvidia>
Date:   Mon, 29 Jun 2020 14:51:24 -0700
From:   Nicolin Chen <nicoleotsuka@...il.com>
To:     Krishna Reddy <vdumpa@...dia.com>
Cc:     joro@...tes.org, will@...nel.org, robin.murphy@....com,
        linux-arm-kernel@...ts.infradead.org,
        iommu@...ts.linux-foundation.org, linux-kernel@...r.kernel.org,
        linux-tegra@...r.kernel.org, treding@...dia.com, yhsu@...dia.com,
        snikam@...dia.com, praithatha@...dia.com, talho@...dia.com,
        bbiswas@...dia.com, mperttunen@...dia.com, nicolinc@...dia.com,
        bhuntsman@...dia.com
Subject: Re: [PATCH v7 1/3] iommu/arm-smmu: add NVIDIA implementation for
 dual ARM MMU-500 usage

On Sun, Jun 28, 2020 at 07:28:36PM -0700, Krishna Reddy wrote:
> NVIDIA's Tegra194 SoC uses two ARM MMU-500s together to interleave
> IOVA accesses across them.
> Add NVIDIA implementation for dual ARM MMU-500s and add new compatible
> string for Tegra194 SoC SMMU topology.
> 
> Signed-off-by: Krishna Reddy <vdumpa@...dia.com>

> +static inline void __iomem *nvidia_smmu_page(struct arm_smmu_device *smmu,
> +			       unsigned int inst, int page)
> +{
> +	struct nvidia_smmu *nvidia_smmu = to_nvidia_smmu(smmu);
> +
> +	if (!nvidia_smmu->bases[0])
> +		nvidia_smmu->bases[0] = smmu->base;
> +
> +	return nvidia_smmu->bases[inst] + (page << smmu->pgshift);
> +}

Not critical -- just a nit: why not put the bases[0] in init()?

Everything else looks good to me:

Reviewed-by: Nicolin Chen <nicoleotsuka@...il.com>

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