linux-kernel - Re: [PATCH v4 2/2] ARM: imx6plus: enable internal routing of clk_enet

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Message-ID: <CAGngYiW=Pc_QjsjCv4Pc_R9OZk7nOAKm=k=b4TMbYRZ-08zKrQ@mail.gmail.com>
Date:   Mon, 29 Jun 2020 10:37:25 -0400
From:   Sven Van Asbroeck <thesven73@...il.com>
To:     Fabio Estevam <festevam@...il.com>
Cc:     Shawn Guo <shawnguo@...nel.org>, Fugang Duan <fugang.duan@....com>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        NXP Linux Team <linux-imx@....com>,
        "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
        <linux-arm-kernel@...ts.infradead.org>,
        linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4 2/2] ARM: imx6plus: enable internal routing of
 clk_enet_ref where possible

Hi Fabio,

On Mon, Jun 29, 2020 at 10:26 AM Fabio Estevam <festevam@...il.com> wrote:
>
> Just tested 5.4.24_2.1.0 on an imx6qp sabresd and DHCP also fails there.

I think I discovered the problem !

When I compare the sabresd devicetree on mainline with the actual sabresd
schematics, the devicetree is incorrect ! Things still work, but only
by accident.

The sabresd has an AR8131 PHY, which generates the enet ref clock, not the
imx6. So on the schematic we see that the clock output of the PHY is wired
to imx6 ENET_REF_CLK, so it can be used as a clock source. And GPIO_16
is disconnected, as it should, because the imx6 is not generating the ref clk.

But the devicetree is written as if the imx6 is providing the clock ! See
here:

https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/arch/arm/boot/dts/imx6qdl-sabresd.dtsi?h=v5.7.6#n513

Also there is no override of the fec PTP clock:
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/arch/arm/boot/dts/imx6qdl-sabresd.dtsi?h=v5.7.6#n202

Although Shawn's mainline patch mandates this?
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.7.6&id=810c0ca879098a993e2ce0a190d24d11c17df748

This will work, but only by accident. So on a plus, when we
(incorrectly) switch the
bypass bit on, things stop working.