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Message-ID: <BYAPR12MB2822B43B0218F6E55C97451BB36F0@BYAPR12MB2822.namprd12.prod.outlook.com>
Date: Tue, 30 Jun 2020 17:16:09 +0000
From: Krishna Reddy <vdumpa@...dia.com>
To: Jonathan Hunter <jonathanh@...dia.com>
CC: "joro@...tes.org" <joro@...tes.org>,
"will@...nel.org" <will@...nel.org>,
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"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
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"linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
Thierry Reding <treding@...dia.com>,
"Yu-Huan Hsu" <YHsu@...dia.com>, Sachin Nikam <Snikam@...dia.com>,
Pritesh Raithatha <praithatha@...dia.com>,
Timo Alho <talho@...dia.com>,
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Subject: RE: [PATCH v8 1/3] iommu/arm-smmu: add NVIDIA implementation for dual
ARM MMU-500 usage
>OK, well I see what you are saying, but if we intended to support all 3 for Tegra194, then we should ensure all 3 are initialised correctly.
The driver intend to support up to 3 instances. It doesn't really mandate that all three instances be present in same DT node.
Each mmio aperture in "reg" property is an instance here. reg = <inst0_base, size>, <inst1_base, size>, <inst2_base, size>;
The reg can have all three or less and driver just configures based on reg and it works fine.
>It would be better to query the number of SMMUs populated in device-tree and then ensure that all are initialised correctly.
Getting the IORESOURCE_MEM is the way to count the instances driver need to support.
In a way, It is already querying through IORESOURCE_MEM here.
-KR
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