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Message-ID: <CAJZ5v0giN1Jmgdh5q_eiJ60O31c-Ez2EY9WLnmn7Z8f9tQvUWw@mail.gmail.com>
Date: Tue, 30 Jun 2020 20:35:52 +0200
From: "Rafael J. Wysocki" <rafael@...nel.org>
To: Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>
Cc: "Rafael J. Wysocki" <rjw@...ysocki.net>,
Viresh Kumar <viresh.kumar@...aro.org>,
Len Brown <lenb@...nel.org>,
Doug Smythies <dsmythies@...us.net>,
Borislav Petkov <bp@...en8.de>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>,
"H. Peter Anvin" <hpa@...or.com>,
Peter Zijlstra <peterz@...radead.org>,
Linux PM <linux-pm@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
"the arch/x86 maintainers" <x86@...nel.org>
Subject: Re: [PATCH v4 0/2] cpufreq: intel_pstate: Support raw epp and energy_efficiency
On Fri, Jun 26, 2020 at 8:34 PM Srinivas Pandruvada
<srinivas.pandruvada@...ux.intel.com> wrote:
>
> v4
> Changes suggested by Borislav
> - msr-index file is sorted for the MSR_IA32_POWER_CTL
> - Remove "_enable" from the new attribute
> - Changes related to documentation
> Changes suggested by Peter
> - Use of kstrtobool
> Suspend/resume restore
>
> v3
> Some edits for the description as suggested by Doug
>
> v2
> Remove raw value support for EPB
>
> Srinivas Pandruvada (2):
> cpufreq: intel_pstate: Allow enable/disable energy efficiency
> cpufreq: intel_pstate: Allow raw energy performance preference value
>
> Documentation/admin-guide/pm/intel_pstate.rst | 17 +-
> arch/x86/include/asm/msr-index.h | 6 +-
> drivers/cpufreq/intel_pstate.c | 147 ++++++++++++++----
> 3 files changed, 133 insertions(+), 37 deletions(-)
>
> --
Both applied as 5.9 material, thanks!
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