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Message-ID: <9c2a5410-044e-03cb-9233-900389d0dfea@arm.com>
Date: Tue, 30 Jun 2020 11:16:18 +0100
From: Suzuki K Poulose <suzuki.poulose@....com>
To: anshuman.khandual@....com, linux-arm-kernel@...ts.infradead.org
Cc: catalin.marinas@....com, will@...nel.org, broonie@...nel.org,
mark.rutland@....com, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64/cpufeature: Validate feature bits spacing in
arm64_ftr_regs[]
On 06/30/2020 02:49 AM, Anshuman Khandual wrote:
>
>
> On 06/29/2020 04:12 PM, Suzuki K Poulose wrote:
>> On 06/16/2020 03:25 AM, Anshuman Khandual wrote:
>>> arm64_feature_bits for a register in arm64_ftr_regs[] are in a descending
>>> order as per their shift values. Validate that these features bits are
>>> defined correctly and do not overlap with each other. This check protects
>>> against any inadvertent erroneous changes to the register definitions.
>>>
>>> Cc: Catalin Marinas <catalin.marinas@....com>
>>> Cc: Will Deacon <will@...nel.org>
>>> Cc: Suzuki K Poulose <suzuki.poulose@....com>
>>> Cc: Mark Brown <broonie@...nel.org>
>>> Cc: Mark Rutland <mark.rutland@....com>
>>> Cc: linux-arm-kernel@...ts.infradead.org
>>> Cc: linux-kernel@...r.kernel.org
>>> Signed-off-by: Anshuman Khandual <anshuman.khandual@....com>
>>> ---
>>> Applies on 5.8-rc1.
>>>
>>> arch/arm64/kernel/cpufeature.c | 45 +++++++++++++++++++++++++++++++---
>>> 1 file changed, 42 insertions(+), 3 deletions(-)
>>> + }
>>> - /* Check that the array is sorted so that we can do the binary search */
>>> - for (i = 1; i < ARRAY_SIZE(arm64_ftr_regs); i++)
>>> + /*
>>> + * Skip the first register. There is nothing to
>>> + * compare against for now.
>>> + */
>>> + if (i == 0)
>>> + continue;
>>
>> You are starting at 1 already, so you may skip this check.
>
> Actually, now we are starting with 0 instead for both i and j.
> Hence this check would be required.
Sorry, ignore that.
Suzuki
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