linux-kernel - Re: [PATCH V2 09/23] perf/x86/intel: Check Arch LBR MSRs

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Message-ID: <20200630145721.GR4781@hirez.programming.kicks-ass.net>
Date:   Tue, 30 Jun 2020 16:57:21 +0200
From:   Peter Zijlstra <peterz@...radead.org>
To:     kan.liang@...ux.intel.com
Cc:     mingo@...hat.com, acme@...nel.org, tglx@...utronix.de,
        bp@...en8.de, x86@...nel.org, linux-kernel@...r.kernel.org,
        mark.rutland@....com, alexander.shishkin@...ux.intel.com,
        jolsa@...hat.com, namhyung@...nel.org, dave.hansen@...el.com,
        yu-cheng.yu@...el.com, bigeasy@...utronix.de, gorcunov@...il.com,
        hpa@...or.com, alexey.budankov@...ux.intel.com, eranian@...gle.com,
        ak@...ux.intel.com, like.xu@...ux.intel.com,
        yao.jin@...ux.intel.com, wei.w.wang@...el.com
Subject: Re: [PATCH V2 09/23] perf/x86/intel: Check Arch LBR MSRs

On Fri, Jun 26, 2020 at 11:20:06AM -0700, kan.liang@...ux.intel.com wrote:
> From: Kan Liang <kan.liang@...ux.intel.com>
> 
> The KVM may not support the MSRs of Architecture LBR. Accessing the
> MSRs may cause #GP and crash the guest.
> 
> The MSRs have to be checked at guest boot time.
> 
> Only using the max number of Architecture LBR depth to check the
> MSR_ARCH_LBR_DEPTH should be good enough. The max number can be
> calculated by 8 * the position of the last set bit of LBR_DEPTH value
> in CPUID enumeration.

But But But, this is architectural, it's in CPUID. If KVM lies to us, it
gets to keep the pices.

This was different when it was not enumerated and all we had was poking
the MSRs, but here KVM can simply mask the CPUID bits if it doesn't
support the MSRs.

If KVM gives us the CPUID bits, we should let it crash and burn if it
then doesn't provide the MSRs.