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Message-ID: <caa05cad-ff88-fbcb-ce13-9e43133afb7b@linaro.org>
Date: Wed, 1 Jul 2020 22:39:11 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Jonathan Marek <jonathan@...ek.ca>, linux-arm-msm@...r.kernel.org
Cc: Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
"open list:COMMON CLK FRAMEWORK" <linux-clk@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 07/13] dt-bindings: clock: Introduce SM8250 QCOM
Graphics clock bindings
On 29/06/2020 20:20, Jonathan Marek wrote:
> Add device tree bindings for graphics clock controller for
> Qualcomm Technology Inc's SM8250 SoCs.
>
> Signed-off-by: Jonathan Marek <jonathan@...ek.ca>
> ---
> .../bindings/clock/qcom,sm8250-gpucc.yaml | 74 +++++++++++++++++++
> include/dt-bindings/clock/qcom,gpucc-sm8250.h | 40 ++++++++++
> 2 files changed, 114 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm8250-gpucc.yaml
> create mode 100644 include/dt-bindings/clock/qcom,gpucc-sm8250.h
>
> diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8250-gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8250-gpucc.yaml
> new file mode 100644
> index 000000000000..2b9c8f97b76d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/qcom,sm8250-gpucc.yaml
> @@ -0,0 +1,74 @@
> +# SPDX-License-Identifier: GPL-2.0-only
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/qcom,sm8250-gpucc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Graphics Clock & Reset Controller Binding for SM8250
> +
> +maintainers:
> + -
> +
> +description: |
> + Qualcomm graphics clock control module which supports the clocks, resets and
> + power domains on SM8250.
> +
> + See also dt-bindings/clock/qcom,gpucc-sm8250.h.
> +
> +properties:
> + compatible:
> + const: qcom,sm8250-gpucc
> +
> + clocks:
> + items:
> + - description: Board XO source
> + - description: GPLL0 main branch source
> + - description: GPLL0 div branch source
> +
> + clock-names:
> + items:
> + - const: bi_tcxo
> + - const: gcc_gpu_gpll0_clk_src
> + - const: gcc_gpu_gpll0_div_clk_src
Missing qdss_qmp_clk here.
> +
> + '#clock-cells':
> + const: 1
> +
--
With best wishes
Dmitry
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