linux-kernel - Re: [PATCH] pinctrl: nsp: Set irq handler based on trig type

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Message-ID: <f6b29c23d867a208a7e4b8c3e71127c078f0b44a.camel@alliedtelesis.co.nz>
Date:   Wed, 1 Jul 2020 20:14:26 +0000
From:   Mark Tomlinson <Mark.Tomlinson@...iedtelesis.co.nz>
To:     "ray.jui@...adcom.com" <ray.jui@...adcom.com>,
        "bcm-kernel-feedback-list@...adcom.com" 
        <bcm-kernel-feedback-list@...adcom.com>,
        "linus.walleij@...aro.org" <linus.walleij@...aro.org>,
        "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
        "sbranden@...adcom.com" <sbranden@...adcom.com>,
        "rjui@...adcom.com" <rjui@...adcom.com>
CC:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] pinctrl: nsp: Set irq handler based on trig type

On Tue, 2020-06-30 at 15:26 -0700, Ray Jui wrote:
> -	u32 trigger_type;
> >  
> > -	trigger_type = irq_get_trigger_type(d->irq);
> > -	if (trigger_type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
> > -		nsp_set_bit(chip, REG, NSP_GPIO_EVENT, gpio, val);
> > +	nsp_set_bit(chip, REG, NSP_GPIO_EVENT, gpio, val);
> 
> 
> I have a question here. I assume writing a bit to this register will
> result in clearing that bit, is that true?
> 
> Based on the driver, the 'nsp_gpio_irq_handler' seems to rely on
> 'NSP_GPIO_EVENT' register to figure out which GPIO the interrupt is for.
> And if so, and if this is cleared here that is invoked before the actual
> IRQ handler, how does this work?

It seems that this change masked another issue I was having. However,
the original code is still wrong as using nsp_set_bit() will do a
read/modify/write and clear all events regardless of what gpio is.

I have found another issue, where I'm getting many more edge-triggered
interrupts than I think I should be, so I'll sort that and send a v2 of
this patch.