linux-kernel - Re: [PATCH v9 1/3] dt-bindings: phy: Add DT bindings for Xilinx ZynqMP PSGTR PHY

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Message-ID: <CAL_JsqJaL3avLf6YGhAbSezykKi+hmCZWM0S1VZRdZSiBtkVbA@mail.gmail.com>
Date:   Wed, 1 Jul 2020 17:04:04 -0600
From:   Rob Herring <robh@...nel.org>
To:     Laurent Pinchart <laurent.pinchart@...asonboard.com>
Cc:     Kishon Vijay Abraham I <kishon@...com>,
        Vinod Koul <vkoul@...nel.org>, devicetree@...r.kernel.org,
        Anurag Kumar Vulisha <anurag.kumar.vulisha@...inx.com>,
        Michal Simek <michal.simek@...inx.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v9 1/3] dt-bindings: phy: Add DT bindings for Xilinx
 ZynqMP PSGTR PHY

On Wed, Jul 1, 2020 at 7:33 AM Laurent Pinchart
<laurent.pinchart@...asonboard.com> wrote:
>
> Hi Rob,
>
> On Mon, Jun 29, 2020 at 04:30:11PM -0600, Rob Herring wrote:
> > On Mon, 29 Jun 2020 15:00:52 +0300, Laurent Pinchart wrote:
> > > From: Anurag Kumar Vulisha <anurag.kumar.vulisha@...inx.com>
> > >
> > > Add DT bindings for the Xilinx ZynqMP PHY. ZynqMP SoCs have a High Speed
> > > Processing System Gigabit Transceiver which provides PHY capabilities to
> > > USB, SATA, PCIE, Display Port and Ehernet SGMII controllers.
> > >
> > > Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@...inx.com>
> > > Signed-off-by: Laurent Pinchart <laurent.pinchart@...asonboard.com>
> > > Reviewed-by: Rob Herring <robh@...nel.org>
> > > ---
> > > Changes since v8:
> > >
> > > - Rebase on phy/next
> > >
> > > Changes since v7:
> > >
> > > - Switch to GPL-2.0-only OR BSD-2-Clause
> > >
> > > Changes since v6:
> > >
> > > - Fixed specification of compatible-dependent xlnx,tx-termination-fix
> > >   property
> > > - Dropped status property from example
> > > - Use 4 spaces to indent example
> > >
> > > Changes since v5:
> > >
> > > - Document clocks and clock-names properties
> > > - Document resets and reset-names properties
> > > - Replace subnodes with an additional entry in the PHY cells
> > > - Drop lane frequency PHY cell, replaced by reference clock phandle
> > > - Convert bindings to YAML
> > > - Reword the subject line
> > > - Drop Rob's R-b as the bindings have significantly changed
> > > - Drop resets and reset-names properties
> > > ---
> > >  .../bindings/phy/xlnx,zynqmp-psgtr.yaml       | 105 ++++++++++++++++++
> > >  include/dt-bindings/phy/phy.h                 |   1 +
> > >  2 files changed, 106 insertions(+)
> > >  create mode 100644 Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml
> > >
> >
> >
> > My bot found errors running 'make dt_binding_check' on your patch:
> >
> > /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.example.dt.yaml: example-0: phy@...00000:reg:0: [0, 4248829952, 0, 262144] is too long
> > /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.example.dt.yaml: example-0: phy@...00000:reg:1: [0, 4248633344, 0, 4096] is too long
> >
> >
> > See https://patchwork.ozlabs.org/patch/1319269
> >
> > If you already ran 'make dt_binding_check' and didn't see the above
> > error(s), then make sure dt-schema is up to date:
> >
> > pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade
> >
> > Please check and re-submit.
>
> Sorry :-S I've updated the schema now. The patch has already been
> merged, so I'll submit a fix.

No worries, it's a moving target. The check just got added to the schemas.

Rob