linux-kernel - [PATCH V2] arm64/cpufeature: Validate feature bits spacing in arm64_ftr

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Message-Id: <1593581140-4339-1-git-send-email-anshuman.khandual@arm.com>
Date:   Wed,  1 Jul 2020 10:55:40 +0530
From:   Anshuman Khandual <anshuman.khandual@....com>
To:     linux-arm-kernel@...ts.infradead.org
Cc:     Anshuman Khandual <anshuman.khandual@....com>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will@...nel.org>,
        Suzuki K Poulose <suzuki.poulose@....com>,
        Mark Brown <broonie@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        linux-kernel@...r.kernel.org
Subject: [PATCH V2] arm64/cpufeature: Validate feature bits spacing in arm64_ftr_regs[]

arm64_feature_bits for a register in arm64_ftr_regs[] are in a descending
order as per their shift values. Validate that these features bits are
defined correctly and do not overlap with each other. This check protects
against any inadvertent erroneous changes to the register definitions.

Cc: Catalin Marinas <catalin.marinas@....com>
Cc: Will Deacon <will@...nel.org>
Cc: Suzuki K Poulose <suzuki.poulose@....com>
Cc: Mark Brown <broonie@...nel.org>
Cc: Mark Rutland <mark.rutland@....com>
Cc: linux-arm-kernel@...ts.infradead.org
Cc: linux-kernel@...r.kernel.org
Signed-off-by: Anshuman Khandual <anshuman.khandual@....com>
---
Applies on 5.8-rc3.

Changes in V2:

- Replaced WARN_ON() with WARN() dropping the conditional block per Suzuki

Changes in V1: (https://patchwork.kernel.org/patch/11606285/)

 arch/arm64/kernel/cpufeature.c | 45 +++++++++++++++++++++++++++++++---
 1 file changed, 42 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 9f63053a63a9..7bd7e6f936a5 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -697,11 +697,50 @@ static s64 arm64_ftr_safe_value(const struct arm64_ftr_bits *ftrp, s64 new,
 
 static void __init sort_ftr_regs(void)
 {
-	int i;
+	const struct arm64_ftr_reg *ftr_reg;
+	const struct arm64_ftr_bits *ftr_bits;
+	unsigned int i, j, width, shift, prev_shift;
+
+	for (i = 0; i < ARRAY_SIZE(arm64_ftr_regs); i++) {
+		/*
+		 * Features here must be sorted in descending order with respect
+		 * to their shift values and should not overlap with each other.
+		 */
+		ftr_reg = arm64_ftr_regs[i].reg;
+		for (ftr_bits = ftr_reg->ftr_bits, j = 0;
+				ftr_bits->width != 0; ftr_bits++, j++) {
+			WARN((ftr_bits->shift  + ftr_bits->width) > 64,
+				"%s has invalid feature at shift %d\n",
+				ftr_reg->name, ftr_bits->shift);
+
+			/*
+			 * Skip the first feature. There is nothing to
+			 * compare against for now.
+			 */
+			if (j == 0)
+				continue;
+
+			prev_shift = ftr_reg->ftr_bits[j - 1].shift;
+			width = ftr_reg->ftr_bits[j].width;
+			shift = ftr_reg->ftr_bits[j].shift;
+			WARN(prev_shift < (shift + width),
+				"%s has feature overlap at shift %d\n",
+				ftr_reg->name, ftr_bits->shift);
+		}
 
-	/* Check that the array is sorted so that we can do the binary search */
-	for (i = 1; i < ARRAY_SIZE(arm64_ftr_regs); i++)
+		/*
+		 * Skip the first register. There is nothing to
+		 * compare against for now.
+		 */
+		if (i == 0)
+			continue;
+		/*
+		 * Registers here must be sorted in ascending order with respect
+		 * to sys_id for subsequent binary search in get_arm64_ftr_reg()
+		 * to work correctly.
+		 */
 		BUG_ON(arm64_ftr_regs[i].sys_id < arm64_ftr_regs[i - 1].sys_id);
+	}
 }
 
 /*
-- 
2.20.1