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Message-ID: <20200701102427.GD14959@willie-the-truck>
Date: Wed, 1 Jul 2020 11:24:28 +0100
From: Will Deacon <will@...nel.org>
To: Marco Elver <elver@...gle.com>
Cc: Mark Rutland <mark.rutland@....com>,
Kees Cook <keescook@...omium.org>,
"Paul E. McKenney" <paulmck@...nel.org>,
"Michael S. Tsirkin" <mst@...hat.com>,
Peter Zijlstra <peterz@...radead.org>,
Catalin Marinas <catalin.marinas@....com>,
Jason Wang <jasowang@...hat.com>,
Nick Desaulniers <ndesaulniers@...gle.com>,
Josh Triplett <josh@...htriplett.org>,
LKML <linux-kernel@...r.kernel.org>,
Ivan Kokshaysky <ink@...assic.park.msu.ru>,
linux-arm-kernel@...ts.infradead.org,
Sami Tolvanen <samitolvanen@...gle.com>,
linux-alpha@...r.kernel.org,
Alan Stern <stern@...land.harvard.edu>,
Matt Turner <mattst88@...il.com>,
virtualization@...ts.linux-foundation.org,
Android Kernel Team <kernel-team@...roid.com>,
Boqun Feng <boqun.feng@...il.com>,
Arnd Bergmann <arnd@...db.de>,
Richard Henderson <rth@...ddle.net>
Subject: Re: [PATCH 18/18] arm64: lto: Strengthen READ_ONCE() to acquire when
CLANG_LTO=y
On Tue, Jun 30, 2020 at 09:47:30PM +0200, Marco Elver wrote:
> On Tue, 30 Jun 2020 at 19:39, Will Deacon <will@...nel.org> wrote:
> >
> > When building with LTO, there is an increased risk of the compiler
> > converting an address dependency headed by a READ_ONCE() invocation
> > into a control dependency and consequently allowing for harmful
> > reordering by the CPU.
> >
> > Ensure that such transformations are harmless by overriding the generic
> > READ_ONCE() definition with one that provides acquire semantics when
> > building with LTO.
> >
> > Signed-off-by: Will Deacon <will@...nel.org>
> > ---
> > arch/arm64/include/asm/rwonce.h | 63 +++++++++++++++++++++++++++++++
> > arch/arm64/kernel/vdso/Makefile | 2 +-
> > arch/arm64/kernel/vdso32/Makefile | 2 +-
> > 3 files changed, 65 insertions(+), 2 deletions(-)
> > create mode 100644 arch/arm64/include/asm/rwonce.h
>
> This seems reasonable, given we can't realistically tell the compiler
> about dependent loads. What (if any), is the performance impact? I
> guess this also heavily depends on the actual silicon.
Right, it depends both on the CPU micro-architecture and also the workload.
When we ran some basic tests, the overhead wasn't greater than the benefit
seen by enabling LTO, so it seems like a reasonable trade-off (given that
LTO is a dependency for CFI, so it's not just about performance).
Will
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