linux-kernel - [PATCH v4 8/9] arm64: dts: rockchip: add isp0 node for rk3399

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Message-Id: <20200702191322.2639681-9-helen.koike@collabora.com>
Date:   Thu,  2 Jul 2020 16:13:21 -0300
From:   Helen Koike <helen.koike@...labora.com>
To:     devicetree@...r.kernel.org, linux-media@...r.kernel.org,
        linux-rockchip@...ts.infradead.org
Cc:     linux-kernel@...r.kernel.org, devel@...verdev.osuosl.org,
        robh+dt@...nel.org, heiko@...ech.de, hverkuil-cisco@...all.nl,
        kernel@...labora.com, dafna.hirschfeld@...labora.com,
        ezequiel@...labora.com, mark.rutland@....com,
        karthik.poduval@...il.com, jbx6244@...il.com, tfiga@...omium.org,
        eddie.cai.linux@...il.com, zhengsq@...k-chips.com,
        robin.murphy@....com
Subject: [PATCH v4 8/9] arm64: dts: rockchip: add isp0 node for rk3399

From: Shunqian Zheng <zhengsq@...k-chips.com>

RK3399 has two ISPs, but only isp0 was tested.
Add isp0 node in rk3399 dtsi

Verified with:
make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/media/rockchip-isp1.yaml

Signed-off-by: Shunqian Zheng <zhengsq@...k-chips.com>
Signed-off-by: Jacob Chen <jacob2.chen@...k-chips.com>
Signed-off-by: Helen Koike <helen.koike@...labora.com>

---

V4:
- update clock names

V3:
- clean up clocks

V2:
- re-order power-domains property

V1:
This patch was originally part of this patchset:

    https://patchwork.kernel.org/patch/10267431/

The only difference is:
- add phy properties
- add ports
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 25 ++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index dba9641947a3a..ed8ba75dbbce8 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1721,6 +1721,31 @@ vopb_mmu: iommu@...03f00 {
 		status = "disabled";
 	};
 
+	isp0: isp0@...10000 {
+		compatible = "rockchip,rk3399-cif-isp";
+		reg = <0x0 0xff910000 0x0 0x4000>;
+		interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
+		clocks = <&cru SCLK_ISP0>,
+			 <&cru ACLK_ISP0_WRAPPER>,
+			 <&cru HCLK_ISP0_WRAPPER>;
+		clock-names = "isp", "aclk", "hclk";
+		iommus = <&isp0_mmu>;
+		phys = <&mipi_dphy_rx0>;
+		phy-names = "dphy";
+		power-domains = <&power RK3399_PD_ISP0>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
+		};
+	};
+
 	isp0_mmu: iommu@...14000 {
 		compatible = "rockchip,iommu";
 		reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
-- 
2.26.0