lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <1593702489-21648-8-git-send-email-yibin.gong@nxp.com>
Date:   Thu,  2 Jul 2020 23:08:07 +0800
From:   Robin Gong <yibin.gong@....com>
To:     vkoul@...nel.org, robh+dt@...nel.org, shawnguo@...nel.org,
        s.hauer@...gutronix.de, festevam@...il.com,
        catalin.marinas@....com, will@...nel.org, dan.j.williams@...el.com,
        angelo@...am.it
Cc:     kernel@...gutronix.de, linux-imx@....com,
        dmaengine@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: [PATCH v1 7/9] firmware: imx: scu-pd: correct dma resource

enlarge dma0/dma1 channel resource to 32 and split two parts of dma2 since
their resource id are not continouse.

Signed-off-by: Robin Gong <yibin.gong@....com>
---
 drivers/firmware/imx/scu-pd.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/firmware/imx/scu-pd.c b/drivers/firmware/imx/scu-pd.c
index af3d6d9..9818890 100644
--- a/drivers/firmware/imx/scu-pd.c
+++ b/drivers/firmware/imx/scu-pd.c
@@ -110,9 +110,10 @@ static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = {
 	{ "audio-pll1", IMX_SC_R_AUDIO_PLL_1, 1, false, 0 },
 	{ "audio-clk-0", IMX_SC_R_AUDIO_CLK_0, 1, false, 0 },
 	{ "audio-clk-1", IMX_SC_R_AUDIO_CLK_1, 1, false, 0 },
-	{ "dma0-ch", IMX_SC_R_DMA_0_CH0, 16, true, 0 },
-	{ "dma1-ch", IMX_SC_R_DMA_1_CH0, 16, true, 0 },
-	{ "dma2-ch", IMX_SC_R_DMA_2_CH0, 5, true, 0 },
+	{ "dma0-ch", IMX_SC_R_DMA_0_CH0, 32, true, 0 },
+	{ "dma1-ch", IMX_SC_R_DMA_1_CH0, 32, true, 0 },
+	{ "dma2-ch0", IMX_SC_R_DMA_2_CH0, 5, true, 0 },
+	{ "dma2-ch1", IMX_SC_R_DMA_2_CH5, 27, true, 0 },
 	{ "asrc0", IMX_SC_R_ASRC_0, 1, false, 0 },
 	{ "asrc1", IMX_SC_R_ASRC_1, 1, false, 0 },
 	{ "esai0", IMX_SC_R_ESAI_0, 1, false, 0 },
-- 
2.7.4

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ