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Message-ID: <20200702135556.36896-2-zhukeqian1@huawei.com>
Date: Thu, 2 Jul 2020 21:55:49 +0800
From: Keqian Zhu <zhukeqian1@...wei.com>
To: <linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<kvmarm@...ts.cs.columbia.edu>, <kvm@...r.kernel.org>
CC: Catalin Marinas <catalin.marinas@....com>,
Marc Zyngier <maz@...nel.org>,
James Morse <james.morse@....com>,
Will Deacon <will@...nel.org>,
"Suzuki K Poulose" <suzuki.poulose@....com>,
Steven Price <steven.price@....com>,
"Sean Christopherson" <sean.j.christopherson@...el.com>,
Julien Thierry <julien.thierry.kdev@...il.com>,
Mark Brown <broonie@...nel.org>,
"Thomas Gleixner" <tglx@...utronix.de>,
Andrew Morton <akpm@...ux-foundation.org>,
Alexios Zavras <alexios.zavras@...el.com>,
<liangpeng10@...wei.com>, <zhengxiang9@...wei.com>,
<wanghaibin.wang@...wei.com>, Keqian Zhu <zhukeqian1@...wei.com>
Subject: [PATCH v2 1/8] KVM: arm64: Set DBM bit for writable PTEs
DBM bit is used by MMU to differentiate a genuinely non-writable
page from a page that is only temporarily non-writable in order
to mark dirty.
Signed-off-by: Keqian Zhu <zhukeqian1@...wei.com>
Signed-off-by: Peng Liang <liangpeng10@...wei.com>
---
arch/arm64/include/asm/kvm_mmu.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/include/asm/kvm_mmu.h b/arch/arm64/include/asm/kvm_mmu.h
index b12bfc1f051a..2700442b0f75 100644
--- a/arch/arm64/include/asm/kvm_mmu.h
+++ b/arch/arm64/include/asm/kvm_mmu.h
@@ -169,6 +169,10 @@ void kvm_clear_hyp_idmap(void);
static inline pte_t kvm_s2pte_mkwrite(pte_t pte)
{
pte_val(pte) |= PTE_S2_RDWR;
+
+ if (IS_ENABLED(CONFIG_ARM64_HW_AFDBM))
+ pte_val(pte) |= PTE_DBM;
+
return pte;
}
--
2.19.1
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