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Date: Thu, 2 Jul 2020 20:22:50 +0530 From: Amit Singh Tomar <amittomer25@...il.com> To: andre.przywara@....com, afaerber@...e.de, manivannan.sadhasivam@...aro.org, sboyd@...nel.org Cc: cristian.ciocaltea@...il.com, linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-actions@...ts.infradead.org Subject: [PATCH v5 04/10] clk: actions: Add MMC clock-register reset bits This commit adds reset bits needed for MMC clock registers present on Actions S700 SoC. Signed-off-by: Amit Singh Tomar <amittomer25@...il.com> --- Changes from v4: * Reordered it from 03/10 to 04/10. Changes from v3: * NO change. Changes from v2: * No change. Changes from v1: * No change. Changes from RFC: * No change. --- drivers/clk/actions/owl-s700.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/clk/actions/owl-s700.c b/drivers/clk/actions/owl-s700.c index a2f34d13fb54..cd60eca7727d 100644 --- a/drivers/clk/actions/owl-s700.c +++ b/drivers/clk/actions/owl-s700.c @@ -577,6 +577,9 @@ static const struct owl_reset_map s700_resets[] = { [RESET_DSI] = { CMU_DEVRST0, BIT(2) }, [RESET_CSI] = { CMU_DEVRST0, BIT(13) }, [RESET_SI] = { CMU_DEVRST0, BIT(14) }, + [RESET_SD0] = { CMU_DEVRST0, BIT(22) }, + [RESET_SD1] = { CMU_DEVRST0, BIT(23) }, + [RESET_SD2] = { CMU_DEVRST0, BIT(24) }, [RESET_I2C0] = { CMU_DEVRST1, BIT(0) }, [RESET_I2C1] = { CMU_DEVRST1, BIT(1) }, [RESET_I2C2] = { CMU_DEVRST1, BIT(2) }, -- 2.7.4
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