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Message-ID: <3172ec21-d773-7fcb-f1ee-f557f72f20c5@arm.com>
Date: Fri, 3 Jul 2020 10:05:38 +0100
From: Robin Murphy <robin.murphy@....com>
To: Tomasz Nowicki <tn@...ihalf.com>, will@...nel.org, joro@...tes.org,
gregory.clement@...tlin.com, robh+dt@...nel.org, hannah@...vell.com
Cc: linux-kernel@...r.kernel.org, iommu@...ts.linux-foundation.org,
devicetree@...r.kernel.org, catalin.marinas@....com,
nadavh@...vell.com, linux-arm-kernel@...ts.infradead.org,
mw@...ihalf.com
Subject: Re: [PATCH v3 3/4] dt-bindings: arm-smmu: add compatible string for
Marvell Armada-AP806 SMMU-500
On 2020-07-02 21:16, Tomasz Nowicki wrote:
> Add specific compatible string for Marvell usage due to errata of
> accessing 64bits registers of ARM SMMU, in AP806.
>
> AP806 SoC uses the generic ARM-MMU500, and there's no specific
> implementation of Marvell, this compatible is used for errata only.
>
> Signed-off-by: Hanna Hawa <hannah@...vell.com>
> Signed-off-by: Gregory CLEMENT <gregory.clement@...tlin.com>
> Signed-off-by: Tomasz Nowicki <tn@...ihalf.com>
> ---
> Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> index d7ceb4c34423..7beca9c00b12 100644
> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> @@ -38,6 +38,11 @@ properties:
> - qcom,sc7180-smmu-500
> - qcom,sdm845-smmu-500
> - const: arm,mmu-500
> + - description: Marvell SoCs implementing "arm,mmu-500"
> + items:
> + - enum:
> + - marvell,ap806-smmu-500
Isn't a single-valued enum just a constant? :P
Robin.
> + - const: arm,mmu-500
> - items:
> - const: arm,mmu-500
> - const: arm,smmu-v2
>
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