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Date: Fri, 3 Jul 2020 21:34:08 +0200
From: Peter Zijlstra <peterz@...radead.org>
To: kan.liang@...ux.intel.com
Cc: mingo@...hat.com, acme@...nel.org, tglx@...utronix.de,
bp@...en8.de, x86@...nel.org, linux-kernel@...r.kernel.org,
mark.rutland@....com, alexander.shishkin@...ux.intel.com,
jolsa@...hat.com, namhyung@...nel.org, dave.hansen@...el.com,
yu-cheng.yu@...el.com, bigeasy@...utronix.de, gorcunov@...il.com,
hpa@...or.com, alexey.budankov@...ux.intel.com, eranian@...gle.com,
ak@...ux.intel.com, like.xu@...ux.intel.com,
yao.jin@...ux.intel.com, wei.w.wang@...el.com
Subject: Re: [PATCH V3 00/23] Support Architectural LBR
So far so good; I'll merge in these little changes.
I have one more question, but I'll reply for that seperately and we can
do that on top if so.
---
Index: linux-2.6/arch/x86/events/intel/lbr.c
===================================================================
--- linux-2.6.orig/arch/x86/events/intel/lbr.c
+++ linux-2.6/arch/x86/events/intel/lbr.c
@@ -411,7 +411,7 @@ static __always_inline u64 rdlbr_info(un
return val;
}
-static __always_inline void
+static inline void
wrlbr_all(struct lbr_entry *lbr, unsigned int idx, bool need_info)
{
wrlbr_from(idx, lbr->from);
@@ -420,7 +420,7 @@ wrlbr_all(struct lbr_entry *lbr, unsigne
wrlbr_info(idx, lbr->info);
}
-static __always_inline bool
+static inline bool
rdlbr_all(struct lbr_entry *lbr, unsigned int idx, bool need_info)
{
u64 from = rdlbr_from(idx, NULL);
Index: linux-2.6/arch/x86/events/perf_event.h
===================================================================
--- linux-2.6.orig/arch/x86/events/perf_event.h
+++ linux-2.6/arch/x86/events/perf_event.h
@@ -775,7 +775,7 @@ struct x86_perf_task_context {
struct x86_perf_task_context_arch_lbr {
struct x86_perf_task_context_opt opt;
- struct lbr_entry entries[0];
+ struct lbr_entry entries[];
};
/*
@@ -787,17 +787,15 @@ struct x86_perf_task_context_arch_lbr {
* Do not put anything after the LBR state.
*/
struct x86_perf_task_context_arch_lbr_xsave {
- union {
- struct x86_perf_task_context_opt opt;
- u8 padding[64];
- };
+ struct x86_perf_task_context_opt opt;
+
union {
struct xregs_state xsave;
struct {
struct fxregs_state i387;
struct xstate_header header;
struct arch_lbr_state lbr;
- };
+ } __attribute__ ((packed, aligned (XSAVE_ALIGNMENT)));
};
};
Index: linux-2.6/arch/x86/include/asm/fpu/types.h
===================================================================
--- linux-2.6.orig/arch/x86/include/asm/fpu/types.h
+++ linux-2.6/arch/x86/include/asm/fpu/types.h
@@ -253,7 +253,7 @@ struct arch_lbr_state {
u64 ler_from;
u64 ler_to;
u64 ler_info;
- struct lbr_entry entries[0];
+ struct lbr_entry entries[];
} __packed;
struct xstate_header {
@@ -280,8 +280,8 @@ struct xstate_header {
struct xregs_state {
struct fxregs_state i387;
struct xstate_header header;
- u8 extended_state_area[0];
-} __attribute__ ((packed, aligned (64)));
+ u8 extended_state_area[];
+} __attribute__ ((packed, aligned (XSAVE_ALIGNMENT)));
/*
* This is a union of all the possible FPU state formats
Index: linux-2.6/arch/x86/include/asm/perf_event.h
===================================================================
--- linux-2.6.orig/arch/x86/include/asm/perf_event.h
+++ linux-2.6/arch/x86/include/asm/perf_event.h
@@ -283,7 +283,7 @@ struct pebs_xmm {
};
struct pebs_lbr {
- struct lbr_entry lbr[0]; /* Variable length */
+ struct lbr_entry lbr[]; /* Variable length */
};
/*
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