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Message-ID: <f721f7ec-01bd-b2f6-81ea-cee77f425c7a@linux.intel.com>
Date:   Mon, 6 Jul 2020 09:32:22 -0400
From:   "Liang, Kan" <kan.liang@...ux.intel.com>
To:     Peter Zijlstra <peterz@...radead.org>
Cc:     mingo@...hat.com, acme@...nel.org, tglx@...utronix.de,
        bp@...en8.de, x86@...nel.org, linux-kernel@...r.kernel.org,
        mark.rutland@....com, alexander.shishkin@...ux.intel.com,
        jolsa@...hat.com, namhyung@...nel.org, dave.hansen@...el.com,
        yu-cheng.yu@...el.com, bigeasy@...utronix.de, gorcunov@...il.com,
        hpa@...or.com, alexey.budankov@...ux.intel.com, eranian@...gle.com,
        ak@...ux.intel.com, like.xu@...ux.intel.com,
        yao.jin@...ux.intel.com, wei.w.wang@...el.com
Subject: Re: [PATCH V3 13/23] perf/x86/intel/lbr: Factor out
 intel_pmu_store_lbr



On 7/6/2020 6:25 AM, Peter Zijlstra wrote:
> On Fri, Jul 03, 2020 at 04:59:49PM -0400, Liang, Kan wrote:
>> On 7/3/2020 3:50 PM, Peter Zijlstra wrote:
> 
>>> If I'm not mistaken, this correctly deals with LBR_FORMAT_INFO, so can't
>>> we also use the intel_pmu_arch_lbr_read() function for that case?
>>
>> But the intel_pmu_arch_lbr_read() doesn't have the optimization
>> (LBR_NO_INFO) for the LBR_FORMAT_INFO.
>> https://lkml.kernel.org/r/tip-b16a5b52eb90d92b597257778e51e1fdc6423e64@git.kernel.org
>>
>> To apply the optimization, we need extra codes as below.
> 
> Right, I saw that, but shouldn't we support that for anything with this
> format anyway? That is, it's weird and inconsistent to not support
> PERF_SAMPLE_BRANCH_NO_{CYCLES,FLAGS} for PEBS/ARCH-LBR output.
> 

OK. I will support NO_{CYCLES,FLAGS} for PEBS/ARCH-LBR to make the 
output consistent.

> Arguably, we should even support NO_CYCLES for FORMAT_TIME. Yes it's
> daft, but that's what you get for adding the ABI.
> 

I will add another patch to support NO_{CYCLES,FLAGS} for FORMAT_TIME.

The two patches will be on top of the "Support Architectural LBR" 
series. Can I send the two patches in a separate thread?


Thanks,
Kan

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