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Date:   Mon, 6 Jul 2020 10:46:24 -0300
From:   Fabio Estevam <festevam@...il.com>
To:     Andy Duan <fugang.duan@....com>
Cc:     Sven Van Asbroeck <thesven73@...il.com>,
        Shawn Guo <shawnguo@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        "David S. Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>,
        netdev <netdev@...r.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        dl-linux-imx <linux-imx@....com>,
        "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
        <linux-arm-kernel@...ts.infradead.org>,
        linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [EXT] Re: [PATCH v5 3/3] ARM: imx6plus: optionally enable
 internal routing of clk_enet_ref

On Mon, Jul 6, 2020 at 2:30 AM Andy Duan <fugang.duan@....com> wrote:
>
> From: Sven Van Asbroeck <thesven73@...il.com> Sent: Sunday, July 5, 2020 11:34 PM
> >
> >   ext phy---------| \
> >                   |  |
> >   enet_ref-o------|M |----pad------| \
> >            |      |_/              |  |
> >            |                       |M |----mac_gtx
> >            |                       |  |
> >            o-----------------------|_/
> >
> >
> > How do we tell the clock framework that clk_pad has a mux that can be
> > connected to _any_ external clock? and also enet_ref?
>
> The clock depends on board design, HW refer guide can describe the clk
> usage in detail and customer select one clk path as their board design.
>
> To make thing simple, we can just control the second "M" that is controlled
> by gpr bit.

Would it make sense to use compatible = "mmio-mux"; like we do on
imx7s, imx6qdl.dtsi and imx8mq.dtsi?

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