| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <02e701d653ad$dd155a20$97400e60$@samsung.com>
Date: Mon, 6 Jul 2020 21:25:20 +0530
From: "Alim Akhtar" <alim.akhtar@...sung.com>
To: "'Krzysztof Kozlowski'" <krzk@...nel.org>,
"'Rob Herring'" <robh+dt@...nel.org>,
"'Kukjin Kim'" <kgene@...nel.org>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-samsung-soc@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Cc: "'Bartlomiej Zolnierkiewicz'" <b.zolnierkie@...sung.com>,
"'Sylwester Nawrocki'" <snawrocki@...nel.org>,
"'Chanwoo Choi'" <cw00.choi@...sung.com>,
"'Pankaj Dubey'" <pankaj.dubey@...sung.com>
Subject: RE: [PATCH v3] ARM: dts: exynos: Remove DMA controller bus node
name to fix dtschema warnings
Hi Krzysztof
> -----Original Message-----
> From: Krzysztof Kozlowski <krzk@...nel.org>
> Sent: 05 July 2020 23:48
> To: Rob Herring <robh+dt@...nel.org>; Kukjin Kim <kgene@...nel.org>;
> Krzysztof Kozlowski <krzk@...nel.org>; devicetree@...r.kernel.org;
linux-arm-
> kernel@...ts.infradead.org; linux-samsung-soc@...r.kernel.org; linux-
> kernel@...r.kernel.org
> Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@...sung.com>; Sylwester
Nawrocki
> <snawrocki@...nel.org>; Alim Akhtar <alim.akhtar@...sung.com>; Chanwoo
> Choi <cw00.choi@...sung.com>; Pankaj Dubey
> <pankaj.dubey@...sung.com>
> Subject: [PATCH v3] ARM: dts: exynos: Remove DMA controller bus node name
> to fix dtschema warnings
>
> There is no need to keep DMA controller nodes under AMBA bus node.
> Remove the "amba" node to fix dtschema warnings like:
>
> amba: $nodename:0: 'amba' does not match '^(bus|soc|axi|ahb|apb)(@[0-
> 9a-f]+)?$'
>
> Signed-off-by: Krzysztof Kozlowski <krzk@...nel.org>
>
Reviewed-by: Alim Akhtar <alim.akhtar@...sung.com>
> ---
>
> Changes since v2:
> 1. Keep the alphabetical order in exynos4210-universal_c210.dts, as
suggested
> by Marek
>
> Changes since v1:
> 1. Remove the bus, as suggested by Marek
> ---
> arch/arm/boot/dts/exynos3250.dtsi | 47 +++----
> arch/arm/boot/dts/exynos4.dtsi | 70 +++++-----
> .../boot/dts/exynos4210-universal_c210.dts | 28 ++--
> arch/arm/boot/dts/exynos5250.dtsi | 92 ++++++-------
> arch/arm/boot/dts/exynos5410.dtsi | 46 +++----
> arch/arm/boot/dts/exynos5420.dtsi | 130 ++++++++----------
> 6 files changed, 187 insertions(+), 226 deletions(-)
>
> diff --git a/arch/arm/boot/dts/exynos3250.dtsi
> b/arch/arm/boot/dts/exynos3250.dtsi
> index 044e5da64a76..d3fb45a56527 100644
> --- a/arch/arm/boot/dts/exynos3250.dtsi
> +++ b/arch/arm/boot/dts/exynos3250.dtsi
> @@ -418,33 +418,26 @@
> status = "disabled";
> };
>
> - amba {
> - compatible = "simple-bus";
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ranges;
> -
> - pdma0: pdma@...80000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x12680000 0x1000>;
> - interrupts = <GIC_SPI 138
> IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cmu CLK_PDMA0>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> -
> - pdma1: pdma@...90000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x12690000 0x1000>;
> - interrupts = <GIC_SPI 139
> IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cmu CLK_PDMA1>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> + pdma0: pdma@...80000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x12680000 0x1000>;
> + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cmu CLK_PDMA0>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> + };
> +
> + pdma1: pdma@...90000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x12690000 0x1000>;
> + interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cmu CLK_PDMA1>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> };
>
> adc: adc@...c0000 {
> diff --git a/arch/arm/boot/dts/exynos4.dtsi
b/arch/arm/boot/dts/exynos4.dtsi
> index d2779a790ce3..a1e54449f33f 100644
> --- a/arch/arm/boot/dts/exynos4.dtsi
> +++ b/arch/arm/boot/dts/exynos4.dtsi
> @@ -669,45 +669,37 @@
> status = "disabled";
> };
>
> - amba: amba {
> - #address-cells = <1>;
> - #size-cells = <1>;
> - compatible = "simple-bus";
> - interrupt-parent = <&gic>;
> - ranges;
> -
> - pdma0: pdma@...80000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x12680000 0x1000>;
> - interrupts = <GIC_SPI 35
> IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_PDMA0>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> -
> - pdma1: pdma@...90000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x12690000 0x1000>;
> - interrupts = <GIC_SPI 36
> IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_PDMA1>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> -
> - mdma1: mdma@...50000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x12850000 0x1000>;
> - interrupts = <GIC_SPI 34
> IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_MDMA>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <1>;
> - };
> + pdma0: pdma@...80000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x12680000 0x1000>;
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_PDMA0>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> + };
> +
> + pdma1: pdma@...90000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x12690000 0x1000>;
> + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_PDMA1>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> + };
> +
> + mdma1: mdma@...50000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x12850000 0x1000>;
> + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_MDMA>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <1>;
> };
>
> fimd: fimd@...00000 {
> diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts
> b/arch/arm/boot/dts/exynos4210-universal_c210.dts
> index 02fde1a75ebd..99ce53b120ac 100644
> --- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
> +++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
> @@ -181,20 +181,6 @@
> };
> };
>
> -&amba {
> - mdma0: mdma@...40000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x12840000 0x1000>;
> - interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_MDMA>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <1>;
> - power-domains = <&pd_lcd0>;
> - };
> -};
> -
> &camera {
> status = "okay";
>
> @@ -616,6 +602,20 @@
> /delete-property/dma-names;
> };
>
> +&soc {
> + mdma0: mdma@...40000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x12840000 0x1000>;
> + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_MDMA>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <1>;
> + power-domains = <&pd_lcd0>;
> + };
> +};
> +
> &sysram {
> smp-sram@0 {
> status = "disabled";
> diff --git a/arch/arm/boot/dts/exynos5250.dtsi
> b/arch/arm/boot/dts/exynos5250.dtsi
> index b6135af7ef39..e3dbe4166836 100644
> --- a/arch/arm/boot/dts/exynos5250.dtsi
> +++ b/arch/arm/boot/dts/exynos5250.dtsi
> @@ -679,56 +679,48 @@
> samsung,pmureg-phandle =
> <&pmu_system_controller>;
> };
>
> - amba {
> - #address-cells = <1>;
> - #size-cells = <1>;
> - compatible = "simple-bus";
> - interrupt-parent = <&gic>;
> - ranges;
> -
> - pdma0: pdma@...a0000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x121A0000 0x1000>;
> - interrupts = <GIC_SPI 34
> IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_PDMA0>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> -
> - pdma1: pdma@...b0000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x121B0000 0x1000>;
> - interrupts = <GIC_SPI 35
> IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_PDMA1>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> -
> - mdma0: mdma@...00000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x10800000 0x1000>;
> - interrupts = <GIC_SPI 33
> IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_MDMA0>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <1>;
> - };
> -
> - mdma1: mdma@...10000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x11C10000 0x1000>;
> - interrupts = <GIC_SPI 124
> IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_MDMA1>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <1>;
> - };
> + pdma0: pdma@...a0000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x121A0000 0x1000>;
> + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_PDMA0>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> + };
> +
> + pdma1: pdma@...b0000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x121B0000 0x1000>;
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_PDMA1>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> + };
> +
> + mdma0: mdma@...00000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x10800000 0x1000>;
> + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_MDMA0>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <1>;
> + };
> +
> + mdma1: mdma@...10000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x11C10000 0x1000>;
> + interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_MDMA1>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <1>;
> };
>
> gsc_0: gsc@...00000 {
> diff --git a/arch/arm/boot/dts/exynos5410.dtsi
> b/arch/arm/boot/dts/exynos5410.dtsi
> index 2eab80bf5f3a..abe75b9e39f5 100644
> --- a/arch/arm/boot/dts/exynos5410.dtsi
> +++ b/arch/arm/boot/dts/exynos5410.dtsi
> @@ -189,34 +189,26 @@
> interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> - amba {
> - #address-cells = <1>;
> - #size-cells = <1>;
> - compatible = "simple-bus";
> - interrupt-parent = <&gic>;
> - ranges;
> -
> - pdma0: pdma@...a0000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x121a0000 0x1000>;
> - interrupts = <GIC_SPI 34
> IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_PDMA0>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> + pdma0: pdma@...a0000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x121a0000 0x1000>;
> + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_PDMA0>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> + };
>
> - pdma1: pdma@...b0000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x121b0000 0x1000>;
> - interrupts = <GIC_SPI 35
> IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_PDMA1>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> + pdma1: pdma@...b0000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x121b0000 0x1000>;
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_PDMA1>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> };
>
> audi2s0: i2s@...0000 {
> diff --git a/arch/arm/boot/dts/exynos5420.dtsi
> b/arch/arm/boot/dts/exynos5420.dtsi
> index b672080e7469..c76460b70532 100644
> --- a/arch/arm/boot/dts/exynos5420.dtsi
> +++ b/arch/arm/boot/dts/exynos5420.dtsi
> @@ -433,76 +433,68 @@
> power-domains = <&mau_pd>;
> };
>
> - amba {
> - #address-cells = <1>;
> - #size-cells = <1>;
> - compatible = "simple-bus";
> - interrupt-parent = <&gic>;
> - ranges;
> -
> - adma: adma@...0000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x03880000 0x1000>;
> - interrupts = <GIC_SPI 110
> IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock_audss EXYNOS_ADMA>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <6>;
> - #dma-requests = <16>;
> - power-domains = <&mau_pd>;
> - };
> -
> - pdma0: pdma@...a0000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x121A0000 0x1000>;
> - interrupts = <GIC_SPI 34
> IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_PDMA0>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> -
> - pdma1: pdma@...b0000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x121B0000 0x1000>;
> - interrupts = <GIC_SPI 35
> IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_PDMA1>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> -
> - mdma0: mdma@...00000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x10800000 0x1000>;
> - interrupts = <GIC_SPI 33
> IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_MDMA0>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <1>;
> - };
> + adma: adma@...0000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x03880000 0x1000>;
> + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock_audss EXYNOS_ADMA>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <6>;
> + #dma-requests = <16>;
> + power-domains = <&mau_pd>;
> + };
>
> - mdma1: mdma@...10000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x11C10000 0x1000>;
> - interrupts = <GIC_SPI 124
> IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_MDMA1>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <1>;
> - /*
> - * MDMA1 can support both secure and non-
> secure
> - * AXI transactions. When this is enabled in
> - * the kernel for boards that run in secure
> - * mode, we are getting imprecise external
> - * aborts causing the kernel to oops.
> - */
> - status = "disabled";
> - };
> + pdma0: pdma@...a0000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x121A0000 0x1000>;
> + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_PDMA0>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> + };
> +
> + pdma1: pdma@...b0000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x121B0000 0x1000>;
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_PDMA1>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> + };
> +
> + mdma0: mdma@...00000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x10800000 0x1000>;
> + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_MDMA0>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <1>;
> + };
> +
> + mdma1: mdma@...10000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x11C10000 0x1000>;
> + interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_MDMA1>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <1>;
> + /*
> + * MDMA1 can support both secure and non-secure
> + * AXI transactions. When this is enabled in
> + * the kernel for boards that run in secure
> + * mode, we are getting imprecise external
> + * aborts causing the kernel to oops.
> + */
> + status = "disabled";
> };
>
> i2s0: i2s@...0000 {
> --
> 2.17.1
Powered by blists - more mailing lists