linux-kernel - Re: [PATCH v2] pinctrl: qcom: sc7180: Make gpio28 non wakeup capable for google,lazor

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Message-ID: <CAD=FV=WyhJ6g0DZS=ysT-AyXJoiRX=UFE9fXY2NEHfuUHYUXCQ@mail.gmail.com>
Date:   Mon, 6 Jul 2020 13:24:18 -0700
From:   Doug Anderson <dianders@...omium.org>
To:     Rajendra Nayak <rnayak@...eaurora.org>
Cc:     Bjorn Andersson <bjorn.andersson@...aro.org>,
        LinusW <linus.walleij@...aro.org>,
        Andy Gross <agross@...nel.org>,
        linux-arm-msm <linux-arm-msm@...r.kernel.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        LKML <linux-kernel@...r.kernel.org>,
        Maulik Shah <mkshah@...eaurora.org>,
        Lina Iyer <ilina@...eaurora.org>
Subject: Re: [PATCH v2] pinctrl: qcom: sc7180: Make gpio28 non wakeup capable
 for google,lazor

Hi,

On Fri, Jul 3, 2020 at 12:49 AM Rajendra Nayak <rnayak@...eaurora.org> wrote:
>
> The PDC irqchip driver currently does not handle dual-edge interrupts,
> and we have google,lazor board with sc7180 designed to configure gpio28
> as a dual-edge interrupt. This interrupt is however not expected to be
> wakeup capable on this board, so an easy way to fix this, seems to be to
> make this gpio non wakeup capable and let TLMM handle it (which is capable
> of handling dual-edge irqs)
>
> To be able to do so only on this board, so other boards designed with
> this SoC can continue to use gpio28 as a wakeup capable one, make a
> copy of msm_gpio_wakeirq_map for lazor and remove gpio28 from the
> list.
>
> Reported-by: Jimmy Cheng-Yi Chiang <cychiang@...gle.com>
> Signed-off-by: Rajendra Nayak <rnayak@...eaurora.org>
> ---
>  drivers/pinctrl/qcom/pinctrl-sc7180.c | 23 ++++++++++++++++++++++-
>  1 file changed, 22 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/pinctrl/qcom/pinctrl-sc7180.c b/drivers/pinctrl/qcom/pinctrl-sc7180.c
> index 1b6465a..0668933 100644
> --- a/drivers/pinctrl/qcom/pinctrl-sc7180.c
> +++ b/drivers/pinctrl/qcom/pinctrl-sc7180.c
> @@ -1135,7 +1135,24 @@ static const struct msm_gpio_wakeirq_map sc7180_pdc_map[] = {
>         {117, 114}, {118, 119},
>  };
>
> -static const struct msm_pinctrl_soc_data sc7180_pinctrl = {
> +/* Dropped gpio28 from the map for the google,lazor board */
> +static const struct msm_gpio_wakeirq_map sc7180_lazor_pdc_map[] = {
> +       {0, 40}, {3, 50}, {4, 42}, {5, 70}, {6, 41}, {9, 35},
> +       {10, 80}, {11, 51}, {16, 20}, {21, 55}, {22, 90}, {23, 21},
> +       {24, 61}, {26, 52}, {30, 100}, {31, 33}, {32, 81},
> +       {33, 62}, {34, 43}, {36, 91}, {37, 53}, {38, 63}, {39, 72},
> +       {41, 101}, {42, 7}, {43, 34}, {45, 73}, {47, 82}, {49, 17},
> +       {52, 109}, {53, 102}, {55, 92}, {56, 56}, {57, 57}, {58, 83},
> +       {59, 37}, {62, 110}, {63, 111}, {64, 74}, {65, 44}, {66, 93},
> +       {67, 58}, {68, 112}, {69, 32}, {70, 54}, {72, 59}, {73, 64},
> +       {74, 71}, {78, 31}, {82, 30}, {85, 103}, {86, 38}, {87, 39},
> +       {88, 45}, {89, 46}, {90, 47}, {91, 48}, {92, 60}, {93, 49},
> +       {94, 84}, {95, 94}, {98, 65}, {101, 66}, {104, 67}, {109, 104},
> +       {110, 68}, {113, 69}, {114, 113}, {115, 108}, {116, 121},
> +       {117, 114}, {118, 119},
> +};
> +
> +static struct msm_pinctrl_soc_data sc7180_pinctrl = {
>         .pins = sc7180_pins,
>         .npins = ARRAY_SIZE(sc7180_pins),
>         .functions = sc7180_functions,
> @@ -1151,6 +1168,10 @@ static const struct msm_pinctrl_soc_data sc7180_pinctrl = {
>
>  static int sc7180_pinctrl_probe(struct platform_device *pdev)
>  {
> +       if (of_machine_is_compatible("google,lazor")) {
> +               sc7180_pinctrl.wakeirq_map = sc7180_lazor_pdc_map;
> +               sc7180_pinctrl.nwakeirq_map = ARRAY_SIZE(sc7180_lazor_pdc_map);
> +       }

As much as I want patches landed and things working, the above just
doesn't feel like a viable solution.  I guess it could work as a short
term hack but it's going to become untenable pretty quickly.  As we
have more variants of this we're going to have to just keep piling
more machines in here, right?  ...this is also already broken for us
because not all boards will have the "google,lazor" compatible.  From
the current Chrome OS here are the compatibles for various revs/SKUs

compatible = "google,lazor-rev0", "qcom,sc7180";
compatible = "google,lazor-rev0-sku0", "qcom,sc7180";
compatible = "google,lazor", "qcom,sc7180";
compatible = "google,lazor-sku0", "qcom,sc7180";
compatible = "google,lazor-rev2", "qcom,sc7180";

...so of the 5 boards you'll only match one of them.


Maybe I'm jumping into a situation again where I'm ignorant since I
haven't followed all the prior conversation, but is it really that
hard to just add dual edge support to the PDC irqchip driver?  ...or
maybe it's just easier to change the pinctrl driver to emulate dual
edge itself and that can work around the problem in the PDC?  There
seem to be a few samples you could copy from:

$ git log --oneline --no-merges --grep=emulate drivers/pinctrl/
3221f40b7631 pinctrl: mediatek: emulate GPIO interrupt on both-edges
5a92750133ff pinctrl: rockchip: emulate both edge triggered interrupts

...and if you look at those two commits they refer to other examples.
The mediatek one says:

> This follows an example of drivers/gpio/gpio-mxc.c.

...and the Rockchip one says:

> implement a solution similar to pinctrl-coh901

That means you have at least 4 samples to look at?


-Doug