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Message-ID: <HE1PR0402MB337186C44C944E0E360730BC84660@HE1PR0402MB3371.eurprd04.prod.outlook.com>
Date: Tue, 7 Jul 2020 02:10:45 +0000
From: "Z.q. Hou" <zhiqiang.hou@....com>
To: Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Xiaowei Bao <xiaowei.bao@....com>
CC: "M.h. Lian" <minghuan.lian@....com>,
Mingkai Hu <mingkai.hu@....com>,
"bhelgaas@...gle.com" <bhelgaas@...gle.com>,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
"shawnguo@...nel.org" <shawnguo@...nel.org>,
Leo Li <leoyang.li@....com>, "kishon@...com" <kishon@...com>,
Roy Zang <roy.zang@....com>,
"amurray@...goodpenguin.co.uk" <amurray@...goodpenguin.co.uk>,
"jingoohan1@...il.com" <jingoohan1@...il.com>,
"gustavo.pimentel@...opsys.com" <gustavo.pimentel@...opsys.com>,
"andrew.murray@....com" <andrew.murray@....com>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>
Subject: RE: [PATCH v6 00/11] Add the multiple PF support for DWC and
Layerscape
Hi Lorenzo,
> -----Original Message-----
> From: Lorenzo Pieralisi [mailto:lorenzo.pieralisi@....com]
> Sent: 2020年7月6日 18:47
> To: Xiaowei Bao <xiaowei.bao@....com>
> Cc: Z.q. Hou <zhiqiang.hou@....com>; M.h. Lian <minghuan.lian@....com>;
> Mingkai Hu <mingkai.hu@....com>; bhelgaas@...gle.com;
> robh+dt@...nel.org; shawnguo@...nel.org; Leo Li <leoyang.li@....com>;
> kishon@...com; Roy Zang <roy.zang@....com>;
> amurray@...goodpenguin.co.uk; jingoohan1@...il.com;
> gustavo.pimentel@...opsys.com; andrew.murray@....com;
> linux-pci@...r.kernel.org; devicetree@...r.kernel.org;
> linux-kernel@...r.kernel.org; linux-arm-kernel@...ts.infradead.org;
> linuxppc-dev@...ts.ozlabs.org
> Subject: Re: [PATCH v6 00/11] Add the multiple PF support for DWC and
> Layerscape
>
> On Sat, Mar 14, 2020 at 11:30:27AM +0800, Xiaowei Bao wrote:
> > Add the PCIe EP multiple PF support for DWC and Layerscape, add the
> > doorbell MSIX function for DWC, use list to manage the PF of one PCIe
> > controller, and refactor the Layerscape EP driver due to some
> > platforms difference.
> >
> > Xiaowei Bao (11):
> > PCI: designware-ep: Add multiple PFs support for DWC
> > PCI: designware-ep: Add the doorbell mode of MSI-X in EP mode
> > PCI: designware-ep: Move the function of getting MSI capability
> > forward
> > PCI: designware-ep: Modify MSI and MSIX CAP way of finding
> > dt-bindings: pci: layerscape-pci: Add compatible strings for ls1088a
> > and ls2088a
> > PCI: layerscape: Fix some format issue of the code
> > PCI: layerscape: Modify the way of getting capability with different
> > PEX
> > PCI: layerscape: Modify the MSIX to the doorbell mode
> > PCI: layerscape: Add EP mode support for ls1088a and ls2088a
> > arm64: dts: layerscape: Add PCIe EP node for ls1088a
> > misc: pci_endpoint_test: Add LS1088a in pci_device_id table
> >
> > .../devicetree/bindings/pci/layerscape-pci.txt | 2 +
> > arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 31 +++
> > drivers/misc/pci_endpoint_test.c | 2 +
> > drivers/pci/controller/dwc/pci-layerscape-ep.c | 100 ++++++--
> > drivers/pci/controller/dwc/pcie-designware-ep.c | 255
> +++++++++++++++++----
> > drivers/pci/controller/dwc/pcie-designware.c | 59 +++--
> > drivers/pci/controller/dwc/pcie-designware.h | 48 +++-
> > 7 files changed, 404 insertions(+), 93 deletions(-)
>
> Can you rebase it against v5.8-rc1 please ?
Yes, I will help to rebase.
Thanks,
Zhiqiang
>
> Thanks,
> Lorenzo
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