linux-kernel - [PATCH v2 0/4] Expose new features for intel processor

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Date:   Tue,  7 Jul 2020 10:16:19 +0800
From:   Cathy Zhang <cathy.zhang@...el.com>
To:     kvm@...r.kernel.org, linux-kernel@...r.kernel.org, x86@...nel.org
Cc:     pbonzini@...hat.com, sean.j.christopherson@...el.com,
        vkuznets@...hat.com, wanpengli@...cent.com, jmattson@...gle.com,
        joro@...tes.org, tglx@...utronix.de, mingo@...hat.com,
        bp@...en8.de, hpa@...or.com, ricardo.neri-calderon@...ux.intel.com,
        kyung.min.park@...el.com, jpoimboe@...hat.com,
        gregkh@...uxfoundation.org, ak@...ux.intel.com,
        dave.hansen@...el.com, tony.luck@...el.com,
        ravi.v.shankar@...el.com, Cathy Zhang <cathy.zhang@...el.com>
Subject: [PATCH v2 0/4] Expose new features for intel processor

This patchset is to expose two new features for intel
processors which support them, like Sapphire Rapids.
SERIALIZE is a faster serializing instruction which
does not modify registers, arithmetic flags or memory,
will not cause VM exit. TSX suspend load tracking
instruction aims to give a way to choose which memory
accesses do not need to be tracked in the TSX read set.

Changelog:
v2	Add kernel feature enumeration patch to fix build error

Cathy Zhang (2):
  x86: Expose SERIALIZE for supported cpuid
  x86: Expose TSX Suspend Load Address Tracking

Ricardo Neri (1):
  x86/cpufeatures: Add enumeration for SERIALIZE instruction

Kyung Min Park (1):
  x86/cpufeatures: Enumerate TSX suspend load address tracking
    instructions

 arch/x86/include/asm/cpufeatures.h | 2 ++
 arch/x86/kvm/cpuid.c               | 3 ++-
 2 files changed, 4 insertions(+), 1 deletion(-)

--
1.8.3.1