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Message-ID: <f362680d-b16f-e713-153d-2e026fa8bfd4@huawei.com>
Date: Wed, 8 Jul 2020 17:01:08 +0800
From: Zhenyu Ye <yezhenyu2@...wei.com>
To: Catalin Marinas <catalin.marinas@....com>
CC: <will@...nel.org>, <suzuki.poulose@....com>, <maz@...nel.org>,
<steven.price@....com>, <guohanjun@...wei.com>, <olof@...om.net>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <linux-arch@...r.kernel.org>,
<linux-mm@...ck.org>, <arm@...nel.org>, <xiexiangyou@...wei.com>,
<prime.zeng@...ilicon.com>, <zhangshaokun@...ilicon.com>,
<kuhn.chenqun@...wei.com>
Subject: Re: [RFC PATCH v4 2/2] arm64: tlb: Use the TLBI RANGE feature in
arm64
Hi Catalin,
On 2020/7/8 1:36, Catalin Marinas wrote:
> On Mon, Jun 01, 2020 at 10:47:13PM +0800, Zhenyu Ye wrote:
>> @@ -59,6 +69,47 @@
>> __ta; \
>> })
>>
>> +/*
>> + * __TG defines translation granule of the system, which is decided by
>> + * PAGE_SHIFT. Used by TTL.
>> + * - 4KB : 1
>> + * - 16KB : 2
>> + * - 64KB : 3
>> + */
>> +#define __TG ((PAGE_SHIFT - 12) / 2 + 1)
>
> Nitpick: maybe something like __TLBI_TG to avoid clashes in case someone
> else defines a __TG macro.
>
Thanks for your review. According to Marc and Robin's suggestion, I will remove this
macro.
I'd like implement this in a function beacause it's used in both TTL and TLB RANGE.
>> - for (addr = start; addr < end; addr += stride) {
>> - if (last_level) {
>> - __tlbi(vale1is, addr);
>> - __tlbi_user(vale1is, addr);
>> - } else {
>> - __tlbi(vae1is, addr);
>> - __tlbi_user(vae1is, addr);
>> + while (range_pages > 0) {
>> + if (cpus_have_const_cap(ARM64_HAS_TLBI_RANGE) &&
>> + stride == PAGE_SIZE) {
>
> I think we could have the odd range_pages check here:
>
> if (cpus_have_const_cap(ARM64_HAS_TLBI_RANGE) &&
> stride == PAGE_SIZE && range_pages % 2 == 0) {
>
> and avoid the one outside the loop.
>
This may need some other necessary changes to do this. See in next version series.
Thanks,
Zhenyu
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