linux-kernel - Re: [PATCH 11/14] clk: renesas: Add r8a774e1 CPG Core Clock Definitions

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Wed, 8 Jul 2020 12:17:55 +0200
From:   Geert Uytterhoeven <geert@...ux-m68k.org>
To:     Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Cc:     Magnus Damm <magnus.damm@...il.com>,
        Rob Herring <robh+dt@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        linux-clk <linux-clk@...r.kernel.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Prabhakar <prabhakar.csengg@...il.com>
Subject: Re: [PATCH 11/14] clk: renesas: Add r8a774e1 CPG Core Clock Definitions

On Tue, Jul 7, 2020 at 6:18 PM Lad Prabhakar
<prabhakar.mahadev-lad.rj@...renesas.com> wrote:
>
> From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...renesas.com>
>
> Add all RZ/G2H Clock Pulse Generator Core Clock Outputs, as listed in
> Table 11.2 ("List of Clocks [RZ/G2H]") of the RZ/G2H Hardware User's
> Manual.
>
> Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...renesas.com>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
i.e. will queue in clk-renesas for v5.9, in a branch shared by driver
and DT (renesas-r8a774e1-dt-binding-defs).

> --- /dev/null
> +++ b/include/dt-bindings/clock/r8a774e1-cpg-mssr.h

> +#define R8A774E1_CLK_CANFD             46

I guess it's fine we keep CANFD last, for consistency with other RZ/G2
SoCs (CANFD was not present in early revisions of the Hardware User's
Manual).

Gr{oetje,eeting}s,

                        Geert


--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds