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Date:   Tue, 7 Jul 2020 19:21:02 -0700
From:   Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>
To:     Andy Lutomirski <luto@...nel.org>
Cc:     Cathy Zhang <cathy.zhang@...el.com>,
        kvm list <kvm@...r.kernel.org>,
        LKML <linux-kernel@...r.kernel.org>, X86 ML <x86@...nel.org>,
        Paolo Bonzini <pbonzini@...hat.com>,
        "Christopherson, Sean J" <sean.j.christopherson@...el.com>,
        Vitaly Kuznetsov <vkuznets@...hat.com>,
        Wanpeng Li <wanpengli@...cent.com>,
        Jim Mattson <jmattson@...gle.com>,
        Joerg Roedel <joro@...tes.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        "H. Peter Anvin" <hpa@...or.com>,
        Kyung Min Park <kyung.min.park@...el.com>,
        Josh Poimboeuf <jpoimboe@...hat.com>,
        Greg KH <gregkh@...uxfoundation.org>,
        Andi Kleen <ak@...ux.intel.com>,
        Dave Hansen <dave.hansen@...el.com>,
        Tony Luck <tony.luck@...el.com>,
        "Ravi V. Shankar" <ravi.v.shankar@...el.com>, fenghua.yu@...el.com
Subject: Re: [PATCH v2 1/4] x86/cpufeatures: Add enumeration for SERIALIZE
 instruction

On Tue, Jul 07, 2020 at 09:36:15AM -0700, Andy Lutomirski wrote:
> On Mon, Jul 6, 2020 at 7:21 PM Cathy Zhang <cathy.zhang@...el.com> wrote:
> >
> > This instruction gives software a way to force the processor to complete
> > all modifications to flags, registers and memory from previous instructions
> > and drain all buffered writes to memory before the next instruction is
> > fetched and executed.
> >
> > The same effect can be obtained using the cpuid instruction. However,
> > cpuid causes modification on the eax, ebx, ecx, and ecx regiters; it
> > also causes a VM exit.
> >
> > A processor supports SERIALIZE instruction if CPUID.0x0x.0x0:EDX[14] is
> > present. The CPU feature flag is shown as "serialize" in /proc/cpuinfo.
> >
> > Detailed information on the instructions and CPUID feature flag SERIALIZE
> > can be found in the latest Intel Architecture Instruction Set Extensions
> > and Future Features Programming Reference and Intel 64 and IA-32
> > Architectures Software Developer's Manual.
> 
> Can you also wire this up so sync_core() uses it?

I am cc'ing Fenghua, who has volunteered to work on this. Addind support
for SERIALIZE in sync_core() should not block merging these patches,
correct?

Thanks and BR,
Ricardo

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