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Message-Id: <1594324828-9571-1-git-send-email-akhilpo@codeaurora.org>
Date: Fri, 10 Jul 2020 01:30:20 +0530
From: Akhil P Oommen <akhilpo@...eaurora.org>
To: freedreno@...ts.freedesktop.org
Cc: dri-devel@...edesktop.org, linux-arm-msm@...r.kernel.org,
linux-kernel@...r.kernel.org, jcrouse@...eaurora.org,
smasetty@...eaurora.org, devicetree@...r.kernel.org,
mka@...omium.org, saravanak@...gle.com, sibis@...eaurora.org,
viresh.kumar@...aro.org, jonathan@...ek.ca
Subject: [PATCH v4 0/7] Add support for GPU DDR BW scaling
This is mostly a rebase of Sharat's patches [1] on the tip of msm-next branch.
Changes compared to v3:
1. Rebased on top of Jonathan's patch which adds support for changing
gpu freq through hfi on newer targets. Created patch 1 to make
this the generic approach of setting gpu freq on newer targets.
2. As suggested by Rob, left the icc_path intact for pre-a6xx
GPUs.
As mentioned in [1], these patches have dependency on Georgi's series from
opp/linux-next [2] and also Sibi's patch which adds a helper function to
set and clear ddr bandwidth vote [2].
[1] https://patchwork.freedesktop.org/series/75291/
[2] https://kernel.googlesource.com/pub/scm/linux/kernel/git/vireshk/pm/+log/opp/linux-next/
Akhil P Oommen (1):
drm: msm: a6xx: set gpu freq through hfi
Sharat Masetty (6):
dt-bindings: drm/msm/gpu: Document gpu opp table
drm: msm: a6xx: send opp instead of a frequency
drm: msm: a6xx: use dev_pm_opp_set_bw to scale DDR
arm64: dts: qcom: SDM845: Enable GPU DDR bw scaling
arm64: dts: qcom: sc7180: Add interconnects property for GPU
arm64: dts: qcom: sc7180: Add opp-peak-kBps to GPU opp
.../devicetree/bindings/display/msm/gpu.txt | 28 ++++++
arch/arm64/boot/dts/qcom/sc7180.dtsi | 9 ++
arch/arm64/boot/dts/qcom/sdm845.dtsi | 9 ++
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 105 +++++++++++----------
drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 2 +-
drivers/gpu/drm/msm/msm_gpu.c | 3 +-
drivers/gpu/drm/msm/msm_gpu.h | 3 +-
7 files changed, 106 insertions(+), 53 deletions(-)
--
2.7.4
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