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Message-Id: <1594324828-9571-2-git-send-email-akhilpo@codeaurora.org>
Date: Fri, 10 Jul 2020 01:30:21 +0530
From: Akhil P Oommen <akhilpo@...eaurora.org>
To: freedreno@...ts.freedesktop.org
Cc: dri-devel@...edesktop.org, linux-arm-msm@...r.kernel.org,
linux-kernel@...r.kernel.org, jcrouse@...eaurora.org,
smasetty@...eaurora.org, devicetree@...r.kernel.org,
mka@...omium.org, saravanak@...gle.com, sibis@...eaurora.org,
viresh.kumar@...aro.org, jonathan@...ek.ca
Subject: [PATCH v4 1/7] dt-bindings: drm/msm/gpu: Document gpu opp table
From: Sharat Masetty <smasetty@...eaurora.org>
Update documentation to list the gpu opp table bindings including the
newly added "opp-peak-kBps" needed for GPU-DDR bandwidth scaling.
Signed-off-by: Sharat Masetty <smasetty@...eaurora.org>
Acked-by: Rob Herring <robh@...nel.org>
Signed-off-by: Akhil P Oommen <akhilpo@...eaurora.org>
---
.../devicetree/bindings/display/msm/gpu.txt | 28 ++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/msm/gpu.txt b/Documentation/devicetree/bindings/display/msm/gpu.txt
index fd779cd..1af0ff1 100644
--- a/Documentation/devicetree/bindings/display/msm/gpu.txt
+++ b/Documentation/devicetree/bindings/display/msm/gpu.txt
@@ -112,6 +112,34 @@ Example a6xx (with GMU):
interconnects = <&rsc_hlos MASTER_GFX3D &rsc_hlos SLAVE_EBI1>;
interconnect-names = "gfx-mem";
+ gpu_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-430000000 {
+ opp-hz = /bits/ 64 <430000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
+ opp-peak-kBps = <5412000>;
+ };
+
+ opp-355000000 {
+ opp-hz = /bits/ 64 <355000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
+ opp-peak-kBps = <3072000>;
+ };
+
+ opp-267000000 {
+ opp-hz = /bits/ 64 <267000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
+ opp-peak-kBps = <3072000>;
+ };
+
+ opp-180000000 {
+ opp-hz = /bits/ 64 <180000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;
+ opp-peak-kBps = <1804000>;
+ };
+ };
+
qcom,gmu = <&gmu>;
zap-shader {
--
2.7.4
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