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Message-Id: <20200709215136.28044-4-ansuelsmth@gmail.com>
Date: Thu, 9 Jul 2020 23:51:33 +0200
From: Ansuel Smith <ansuelsmth@...il.com>
To: Amit Kucheria <amit.kucheria@...aro.org>
Cc: Ansuel Smith <ansuelsmth@...il.com>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Zhang Rui <rui.zhang@...el.com>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Rob Herring <robh+dt@...nel.org>, linux-pm@...r.kernel.org,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH 3/6] dt-bindings: thermal: tsens: document ipq8064 bindings
Document the use of regmap phandle for ipq8064 SoCs
Signed-off-by: Ansuel Smith <ansuelsmth@...il.com>
---
.../bindings/thermal/qcom-tsens.yaml | 51 ++++++++++++++++---
1 file changed, 44 insertions(+), 7 deletions(-)
diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
index d7be931b42d2..5ceb5d720e16 100644
--- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
+++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
@@ -24,6 +24,7 @@ properties:
- enum:
- qcom,msm8916-tsens
- qcom,msm8974-tsens
+ - qcom,ipq8064-tsens
- const: qcom,tsens-v0_1
- description: v1 of TSENS
@@ -47,6 +48,11 @@ properties:
- description: TM registers
- description: SROT registers
+ regmap:
+ description:
+ Phandle to the gcc. On ipq8064 SoCs gcc and tsense share the same regs.
+ $ref: /schemas/types.yaml#/definitions/phandle
+
interrupts:
minItems: 1
items:
@@ -111,17 +117,48 @@ allOf:
interrupt-names:
minItems: 2
-required:
- - compatible
- - reg
- - "#qcom,sensors"
- - interrupts
- - interrupt-names
- - "#thermal-sensor-cells"
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,ipq8064-tsens
+ then:
+ required:
+ - compatible
+ - regmap
+ - "#qcom,sensors"
+ - interrupts
+ - interrupt-names
+ - "#thermal-sensor-cells"
+
+ else:
+ required:
+ - compatible
+ - reg
+ - "#qcom,sensors"
+ - interrupts
+ - interrupt-names
+ - "#thermal-sensor-cells"
additionalProperties: false
examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ // Example msm9860 based SoC (ipq8064):
+ tsens: thermal-sensor@...000 {
+ compatible = "qcom,ipq8064-tsens";
+ regmap = <&gcc>;
+
+ nvmem-cells = <&tsens_calib>, <&tsens_backup>;
+ nvmem-cell-names = "calib", "calib_backup";
+
+ interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
+
+ #thermal-sensor-cells = <1>;
+ };
+
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
// Example 1 (legacy: for pre v1 IP):
--
2.27.0
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