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Message-Id: <20200709223016.989-5-f.fainelli@gmail.com>
Date:   Thu,  9 Jul 2020 15:30:14 -0700
From:   Florian Fainelli <f.fainelli@...il.com>
To:     linux-kernel@...r.kernel.org
Cc:     Kamal Dasu <kdasu.kdev@...il.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Jason Cooper <jason@...edaemon.net>,
        Marc Zyngier <maz@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        bcm-kernel-feedback-list@...adcom.com (maintainer:BROADCOM BCM7XXX ARM
        ARCHITECTURE),
        devicetree@...r.kernel.org (open list:OPEN FIRMWARE AND FLATTENED
        DEVICE TREE BINDINGS),
        linux-mips@...r.kernel.org (open list:BROADCOM BMIPS MIPS ARCHITECTURE),
        linux-arm-kernel@...ts.infradead.org (moderated list:BROADCOM BCM7XXX
        ARM ARCHITECTURE)
Subject: [PATCH 4/6] irqchip/brcmstb-l2: Match HIF_SPI_INTR2 compatible

From: Kamal Dasu <kdasu.kdev@...il.com>

The HIF_SPI_INTR2 Level 2 interrupt controller node is defined with the
"brcm,hif-spi-l2-intc" compatible string in Device Tree and behaves as
an edge triggered standard Broadcom STB L2 interrupt controller.

Signed-off-by: Kamal Dasu <kdasu.kdev@...il.com>
Signed-off-by: Florian Fainelli <f.fainelli@...il.com>
---
 drivers/irqchip/irq-brcmstb-l2.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/irqchip/irq-brcmstb-l2.c b/drivers/irqchip/irq-brcmstb-l2.c
index 157fad184bdc..b10fe5042a2f 100644
--- a/drivers/irqchip/irq-brcmstb-l2.c
+++ b/drivers/irqchip/irq-brcmstb-l2.c
@@ -276,6 +276,8 @@ static int __init brcmstb_l2_edge_intc_of_init(struct device_node *np,
 	return brcmstb_l2_intc_of_init(np, parent, &l2_edge_intc_init);
 }
 IRQCHIP_DECLARE(brcmstb_l2_intc, "brcm,l2-intc", brcmstb_l2_edge_intc_of_init);
+IRQCHIP_DECLARE(brcmstb_hif_spi_l2_intc, "brcm,hif-spi-l2-intc",
+		brcmstb_l2_edge_intc_of_init);
 
 static int __init brcmstb_l2_lvl_intc_of_init(struct device_node *np,
 	struct device_node *parent)
-- 
2.17.1

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