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Message-Id: <1594292674-15632-1-git-send-email-rnayak@codeaurora.org>
Date: Thu, 9 Jul 2020 16:34:30 +0530
From: Rajendra Nayak <rnayak@...eaurora.org>
To: robdclark@...il.com, sean@...rly.run, agross@...nel.org,
bjorn.andersson@...aro.org
Cc: dri-devel@...ts.freedesktop.org, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
mka@...omium.org, Rajendra Nayak <rnayak@...eaurora.org>
Subject: [PATCH v3 0/4] DVFS support for dpu and dsi
Changes in v3
- Added dev_pm_opp_put_clkname() in the error path
Changes in v2
- Patch 2: Dropped dsi_link_clk_set_rate_6g_v2 and dsi_link_clk_disable_6g_v2 as suggested by Matthias
These patches add DVFS support for DPU and DSI.
These patches have no other dependency. Patch 1 and 2 will need to be merged in
via the MSM DRM tree.
DT patches will need to land via the msm tree.
Rajendra Nayak (4):
drm/msm/dpu: Use OPP API to set clk/perf state
drm/msm: dsi: Use OPP API to set clk/perf state
arm64: dts: sdm845: Add DSI and MDP OPP tables and power-domains
arm64: dts: sc7180: Add DSI and MDP OPP tables and power-domains
arch/arm64/boot/dts/qcom/sc7180.dtsi | 49 ++++++++++++++++++++++
arch/arm64/boot/dts/qcom/sdm845.dtsi | 59 +++++++++++++++++++++++++++
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 3 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 27 +++++++++++-
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 4 ++
drivers/gpu/drm/msm/dsi/dsi_host.c | 27 +++++++++++-
6 files changed, 165 insertions(+), 4 deletions(-)
--
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