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Message-ID: <202007101225.ZBGNUOHo%lkp@intel.com>
Date: Fri, 10 Jul 2020 12:12:29 +0800
From: kernel test robot <lkp@...el.com>
To: Stephen Boyd <sboyd@...nel.org>
Cc: kbuild-all@...ts.01.org, linux-kernel@...r.kernel.org,
Mark Brown <broonie@...nel.org>, Arnd Bergmann <arnd@...db.de>
Subject: drivers/clk/clk-hsdk-pll.c:407:24: sparse: expected void
Hi Stephen,
First bad commit (maybe != root cause):
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 0bddd227f3dc55975e2b8dfa7fc6f959b062a2c7
commit: bbd7ffdbef6888459f301c5889f3b14ada38b913 clk: Allow the common clk framework to be selectable
date: 9 weeks ago
config: openrisc-randconfig-s031-20200710 (attached as .config)
compiler: or1k-linux-gcc (GCC) 9.3.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.2-37-gc9676a3b-dirty
git checkout bbd7ffdbef6888459f301c5889f3b14ada38b913
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=openrisc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>
sparse warnings: (new ones prefixed by >>)
drivers/clk/clk-hsdk-pll.c:407:24: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void *addr @@ got void [noderef] <asn:2> *spec_regs @@
>> drivers/clk/clk-hsdk-pll.c:407:24: sparse: expected void *addr
drivers/clk/clk-hsdk-pll.c:407:24: sparse: got void [noderef] <asn:2> *spec_regs
drivers/clk/clk-hsdk-pll.c:409:24: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void *addr @@ got void [noderef] <asn:2> *regs @@
drivers/clk/clk-hsdk-pll.c:409:24: sparse: expected void *addr
drivers/clk/clk-hsdk-pll.c:409:24: sparse: got void [noderef] <asn:2> *regs
vim +407 drivers/clk/clk-hsdk-pll.c
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 353
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 354 static void __init of_hsdk_pll_clk_setup(struct device_node *node)
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 355 {
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 356 int ret;
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 357 const char *parent_name;
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 358 unsigned int num_parents;
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 359 struct hsdk_pll_clk *pll_clk;
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 360 struct clk_init_data init = { };
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 361
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 362 pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL);
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 363 if (!pll_clk)
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 364 return;
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 365
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 366 pll_clk->regs = of_iomap(node, 0);
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 367 if (!pll_clk->regs) {
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 368 pr_err("failed to map pll registers\n");
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 369 goto err_free_pll_clk;
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 370 }
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 371
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 372 pll_clk->spec_regs = of_iomap(node, 1);
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 373 if (!pll_clk->spec_regs) {
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 374 pr_err("failed to map pll registers\n");
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 375 goto err_unmap_comm_regs;
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 376 }
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 377
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 378 init.name = node->name;
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 379 init.ops = &hsdk_pll_ops;
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 380 parent_name = of_clk_get_parent_name(node, 0);
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 381 init.parent_names = &parent_name;
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 382 num_parents = of_clk_get_parent_count(node);
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 383 if (num_parents > CGU_PLL_SOURCE_MAX) {
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 384 pr_err("too much clock parents: %u\n", num_parents);
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 385 goto err_unmap_spec_regs;
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 386 }
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 387 init.num_parents = num_parents;
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 388
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 389 pll_clk->hw.init = &init;
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 390 pll_clk->pll_devdata = &core_pll_devdata;
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 391
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 392 ret = clk_hw_register(NULL, &pll_clk->hw);
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 393 if (ret) {
e665f029a283af Rob Herring 2018-08-28 394 pr_err("failed to register %pOFn clock\n", node);
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 395 goto err_unmap_spec_regs;
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 396 }
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 397
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 398 ret = of_clk_add_hw_provider(node, of_clk_hw_simple_get, &pll_clk->hw);
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 399 if (ret) {
e665f029a283af Rob Herring 2018-08-28 400 pr_err("failed to add hw provider for %pOFn clock\n", node);
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 401 goto err_unmap_spec_regs;
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 402 }
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 403
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 404 return;
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 405
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 406 err_unmap_spec_regs:
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 @407 iounmap(pll_clk->spec_regs);
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 408 err_unmap_comm_regs:
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 409 iounmap(pll_clk->regs);
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 410 err_free_pll_clk:
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 411 kfree(pll_clk);
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 412 }
daeeb438c052e3 Eugeniy Paltsev 2017-08-25 413
:::::: The code at line 407 was first introduced by commit
:::::: daeeb438c052e3763617c636943e07a8f3684e9e ARC: clk: introduce HSDK pll driver
:::::: TO: Eugeniy Paltsev <Eugeniy.Paltsev@...opsys.com>
:::::: CC: Stephen Boyd <sboyd@...eaurora.org>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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