linux-kernel - Re: [PATCH net-next v3] net: phy: micrel: add phy-mode support for the KSZ9031 PHY

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <20200710232516.GE3759@piout.net>
Date:   Sat, 11 Jul 2020 01:25:16 +0200
From:   Alexandre Belloni <alexandre.belloni@...tlin.com>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     Oleksij Rempel <o.rempel@...gutronix.de>,
        Florian Fainelli <f.fainelli@...il.com>,
        Heiner Kallweit <hkallweit1@...il.com>,
        David Jander <david@...tonic.nl>,
        "David S. Miller" <davem@...emloft.net>, kernel@...gutronix.de,
        linux-kernel@...r.kernel.org, netdev@...r.kernel.org,
        Philippe Schenker <philippe.schenker@...adex.com>,
        Russell King <linux@...linux.org.uk>
Subject: Re: [PATCH net-next v3] net: phy: micrel: add phy-mode support for
 the KSZ9031 PHY

On 11/07/2020 00:54:53+0200, Andrew Lunn wrote:
> On Sat, Jul 11, 2020 at 12:36:10AM +0200, Alexandre Belloni wrote:
> > Hi Oleksij,
> > 
> > This patch breaks Ethernet on the sama5d3 Xplained and I have not been
> > able to unbreak it.
> 
> Hi Alexandre
> 
>                         macb0: ethernet@...28000 {
>                                 phy-mode = "rgmii";
>                                 #address-cells = <1>;
>                                 #size-cells = <0>;
>                                 status = "okay";
> 
>                                 ethernet-phy@7 {
>                                         reg = <0x7>;
>                                 };
>                         };
> 
> So DT says it wants rgmii. How are the delays being added? Could the
> bootloader be configuring the PHY into rgmii-id mode, which is now
> getting cleared? Or by strapping of pins on the PHY?
> 
> Also, looking at macb_main.c is seen:
> 
>        if (!(bp->caps & MACB_CAPS_USRIO_DISABLED)) {
>                 val = 0;
>                 if (bp->phy_interface == PHY_INTERFACE_MODE_RGMII)
>                         val = GEM_BIT(RGMII);
>                 else if (bp->phy_interface == PHY_INTERFACE_MODE_RMII &&
>                          (bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII))
>                         val = MACB_BIT(RMII);
>                 else if (!(bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII))
>                         val = MACB_BIT(MII);
> 
>                 if (bp->caps & MACB_CAPS_USRIO_HAS_CLKEN)
>                         val |= MACB_BIT(CLKEN);
> 
>                 macb_or_gem_writel(bp, USRIO, val);
>         }
> 
> I don't know if this applies for your hardware, but if you tried
> fixing the PHY by setting phy-mode to "rgmii-id", it could be macb
> then did not set GEM_BIT(RGMII) and so broken even more?
> 

This is exactly what happens. I'll send patches. Thanks Andrew!

> Rather than bp->phy_interface == PHY_INTERFACE_MODE_RGMII,
> phy_interface_mode_is_rgmii() might work better.


-- 
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com