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Message-ID: <fe0c6b0f-0fa1-a4e4-1f60-5258b30c14f9@intel.com>
Date: Fri, 10 Jul 2020 09:41:32 +0300
From: Adrian Hunter <adrian.hunter@...el.com>
To: Eddie James <eajames@...ux.ibm.com>, linux-clk@...r.kernel.org
Cc: linux-kernel@...r.kernel.org, linux-aspeed@...ts.ozlabs.org,
linux-mmc@...r.kernel.org, andrew@...id.au, joel@....id.au,
ulf.hansson@...aro.org, sboyd@...nel.org, mturquette@...libre.com
Subject: Re: [PATCH 2/2] mmc: sdhci-of-aspeed: Fix clock divider calculation
On 9/07/20 10:57 pm, Eddie James wrote:
> When calculating the clock divider, start dividing at 2 instead of 1.
> The divider is divided by two at the end of the calculation, so starting
> at 1 may result in a divider of 0, which shouldn't happen.
>
> Signed-off-by: Eddie James <eajames@...ux.ibm.com>
Acked-by: Adrian Hunter <adrian.hunter@...el.com>
> ---
> drivers/mmc/host/sdhci-of-aspeed.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/sdhci-of-aspeed.c b/drivers/mmc/host/sdhci-of-aspeed.c
> index 56912e30c47e..a1bcc0f4ba9e 100644
> --- a/drivers/mmc/host/sdhci-of-aspeed.c
> +++ b/drivers/mmc/host/sdhci-of-aspeed.c
> @@ -68,7 +68,7 @@ static void aspeed_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
> if (WARN_ON(clock > host->max_clk))
> clock = host->max_clk;
>
> - for (div = 1; div < 256; div *= 2) {
> + for (div = 2; div < 256; div *= 2) {
> if ((parent / div) <= clock)
> break;
> }
>
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