linux-kernel - Re: [PATCH] arm64: dts: uniphier: Add missing clock-names and reset-names to pcie-phy

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:   Fri, 10 Jul 2020 10:56:25 +0900
From:   Masahiro Yamada <masahiroy@...nel.org>
To:     Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>
Cc:     Rob Herring <robh+dt@...nel.org>,
        DTML <devicetree@...r.kernel.org>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] arm64: dts: uniphier: Add missing clock-names and
 reset-names to pcie-phy

On Wed, Jul 8, 2020 at 5:56 PM Kunihiko Hayashi
<hayashi.kunihiko@...ionext.com> wrote:
>
> This adds missing clock-names and reset-names to pcie-phy node according to
> Documentation/devicetree/bindings/phy/socionext,uniphier-pcie.yaml.


Applied, but I tend to consider
b36a2472539293bcab0521bcbc284d6be0448d4b
was a misconversion (or intentional breakage)
because the original uniphier-pcie-phy.txt
did not require clock/reset-names
for ld20, pxs3.



> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>
> ---
>  arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 2 ++
>  arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 2 ++
>  2 files changed, 4 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
> index f4a56b2..a87b8a6 100644
> --- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
> +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
> @@ -936,7 +936,9 @@
>                         compatible = "socionext,uniphier-ld20-pcie-phy";
>                         reg = <0x66038000 0x4000>;
>                         #phy-cells = <0>;
> +                       clock-names = "link";
>                         clocks = <&sys_clk 24>;
> +                       reset-names = "link";
>                         resets = <&sys_rst 24>;
>                         socionext,syscon = <&soc_glue>;
>                 };
> diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
> index 72f1688..0e52dadf 100644
> --- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
> +++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
> @@ -833,7 +833,9 @@
>                         compatible = "socionext,uniphier-pxs3-pcie-phy";
>                         reg = <0x66038000 0x4000>;
>                         #phy-cells = <0>;
> +                       clock-names = "link";
>                         clocks = <&sys_clk 24>;
> +                       reset-names = "link";
>                         resets = <&sys_rst 24>;
>                         socionext,syscon = <&soc_glue>;
>                 };
> --
> 2.7.4
>


--
Best Regards
Masahiro Yamada