linux-kernel - Re: [PATCH v3 13/14] [DO NOT MERGE] arm64: dts: allwinner: h6: Add GPU OPP table

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Fri, 10 Jul 2020 15:45:40 +0200
From:   Piotr Oniszczuk <piotr.oniszczuk@...il.com>
To:     Clément Péron <peron.clem@...il.com>
Cc:     Rob Herring <robh@...nel.org>,
        Tomeu Vizoso <tomeu.vizoso@...labora.com>,
        Steven Price <steven.price@....com>,
        Alyssa Rosenzweig <alyssa.rosenzweig@...labora.com>,
        Viresh Kumar <vireshk@...nel.org>, Nishanth Menon <nm@...com>,
        Stephen Boyd <sboyd@...nel.org>,
        Maxime Ripard <mripard@...nel.org>,
        "wens@...e.org" <wens@...e.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        dri-devel@...ts.freedesktop.org
Subject: Re: [PATCH v3 13/14] [DO NOT MERGE] arm64: dts: allwinner: h6: Add
 GPU OPP table



> Wiadomość napisana przez Clément Péron <peron.clem@...il.com> w dniu 09.07.2020, o godz. 16:03:
> 
> Add an Operating Performance Points table for the GPU to
> enable Dynamic Voltage & Frequency Scaling on the H6.
> 
> The voltage range is set with minival voltage set to the target
> and the maximal voltage set to 1.2V. This allow DVFS framework to
> work properly on board with fixed regulator.
> 
> Signed-off-by: Clément Péron <peron.clem@...il.com>
> ---
> arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 80 ++++++++++++++++++++
> 1 file changed, 80 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> index 8f514a2169aa..a69f9e09a829 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> @@ -174,6 +174,7 @@ gpu: gpu@...0000 {
> 			clocks = <&ccu CLK_GPU>, <&ccu CLK_BUS_GPU>;
> 			clock-names = "core", "bus";
> 			resets = <&ccu RST_BUS_GPU>;
> +			operating-points-v2 = <&gpu_opp_table>;
> 			#cooling-cells = <2>;
> 			status = "disabled";
> 		};
> @@ -1036,4 +1037,83 @@ map0 {
> 			};
> 		};
> 	};
> +
> +	gpu_opp_table: gpu-opp-table {
> +		compatible = "operating-points-v2";
> +
> +		opp@...000000 {
> +			opp-hz = /bits/ 64 <216000000>;
> +			opp-microvolt = <810000 810000 1200000>;
> +		};
> +
> +		opp@...000000 {
> +			opp-hz = /bits/ 64 <264000000>;
> +			opp-microvolt = <810000 810000 1200000>;
> +		};
> +
> +		opp@...000000 {
> +			opp-hz = /bits/ 64 <312000000>;
> +			opp-microvolt = <810000 810000 1200000>;
> +		};
> +
> +		opp@...000000 {
> +			opp-hz = /bits/ 64 <336000000>;
> +			opp-microvolt = <810000 810000 1200000>;
> +		};
> +
> +		opp@...000000 {
> +			opp-hz = /bits/ 64 <360000000>;
> +			opp-microvolt = <820000 820000 1200000>;
> +		};
> +
> +		opp@...000000 {
> +			opp-hz = /bits/ 64 <384000000>;
> +			opp-microvolt = <830000 830000 1200000>;
> +		};
> +
> +		opp@...000000 {
> +			opp-hz = /bits/ 64 <408000000>;
> +			opp-microvolt = <840000 840000 1200000>;
> +		};
> +
> +		opp@...000000 {
> +			opp-hz = /bits/ 64 <420000000>;
> +			opp-microvolt = <850000 850000 1200000>;
> +		};
> +
> +		opp@...000000 {
> +			opp-hz = /bits/ 64 <432000000>;
> +			opp-microvolt = <860000 860000 1200000>;
> +		};
> +
> +		opp@...000000 {
> +			opp-hz = /bits/ 64 <456000000>;
> +			opp-microvolt = <870000 870000 1200000>;
> +		};
> +
> +		opp@...000000 {
> +			opp-hz = /bits/ 64 <504000000>;
> +			opp-microvolt = <890000 890000 1200000>;
> +		};
> +
> +		opp@...000000 {
> +			opp-hz = /bits/ 64 <540000000>;
> +			opp-microvolt = <910000 910000 1200000>;
> +		};
> +
> +		opp@...000000 {
> +			opp-hz = /bits/ 64 <576000000>;
> +			opp-microvolt = <930000 930000 1200000>;
> +		};
> +
> +		opp@...000000 {
> +			opp-hz = /bits/ 64 <624000000>;
> +			opp-microvolt = <950000 950000 1200000>;
> +		};
> +
> +		opp@...000000 {
> +			opp-hz = /bits/ 64 <756000000>;
> +			opp-microvolt = <1040000 1040000 1200000>;
> +		};
> +	};
> };

Clement,

I gave run for v3 on H6 GS1 TVbox and what i discovered: 

1. I have frequent hard hangs if DVFS is enabled (hard reset required),

2. hangs seems to be related to operating points changing - as limiting OPP table to any single entry (tested on 5 highest OPP ) makes my GS1 stable working,

3. hang seems to be exactly related to OPP changes as having OPP table even with just 2 entries already gives hangs,

4. tunings with <regulator-ramp-delay> makes no difference (tested with 0, 2500 and 25000). Also increasing <regulator-enable-ramp-delay> 2 times up (to 64000) makes no change.

Now I have 2 hypothesis: 

a. issue is SW related: software operations in DVFS are somehow "unsafe" at touching hardware (is it possible we have i.e. concurrency issue here?); 

b. issue is HW related: i.e. in steep-up OPP, time between sending change Vdd-gpu command to HW for increasing Vdd and sending command to HW for increasing GPU freq is too short.

To investigate further I done following test: limit OPP table to 4 entries+all 4 entries have the same Vdd. 

If this test will pass the we know issue is b\. 
If it will fail - then issue is a\. 

And on my GS1 this test fails....so for me issue is a\ likely….

let me know how i can help!

br