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Message-ID: <CAL_JsqLbFyVHKU0yf1C9y0DRt6Qz34bvwh9dyiOFX-_wF_XiSw@mail.gmail.com>
Date:   Fri, 10 Jul 2020 09:04:39 -0600
From:   Rob Herring <robh@...nel.org>
To:     Bharat Kumar Gogada <bharat.kumar.gogada@...inx.com>
Cc:     PCI <linux-pci@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Marc Zyngier <maz@...nel.org>
Subject: Re: [PATCH v9 1/2] PCI: xilinx-cpm: Add YAML schemas for Versal CPM
 Root Port

On Tue, Jun 16, 2020 at 6:57 AM Bharat Kumar Gogada
<bharat.kumar.gogada@...inx.com> wrote:
>
> Add YAML schemas documentation for Versal CPM Root Port driver.
>
> Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@...inx.com>
> ---
>  .../devicetree/bindings/pci/xilinx-versal-cpm.yaml | 99 ++++++++++++++++++++++
>  1 file changed, 99 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml

Reviewed-by: Rob Herring <robh@...nel.org>

Though it was not sent to the DT list, so no automatic checking happened.

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