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Message-ID: <20200711064846.16007-1-yong.wu@mediatek.com>
Date: Sat, 11 Jul 2020 14:48:25 +0800
From: Yong Wu <yong.wu@...iatek.com>
To: Joerg Roedel <joro@...tes.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Robin Murphy <robin.murphy@....com>
CC: Will Deacon <will@...nel.org>, Evan Green <evgreen@...omium.org>,
"Tomasz Figa" <tfiga@...gle.com>,
<linux-mediatek@...ts.infradead.org>,
<srv_heupstream@...iatek.com>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<iommu@...ts.linux-foundation.org>, <yong.wu@...iatek.com>,
<youlin.pei@...iatek.com>, Nicolas Boichat <drinkcat@...omium.org>,
<anan.sun@...iatek.com>, <cui.zhang@...iatek.com>,
<chao.hao@...iatek.com>, <ming-fan.chen@...iatek.com>
Subject: [PATCH 00/21] MT8192 IOMMU support
This patch mainly adds support for mt8192 IOMMU and SMI.
mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation
table format. The M4U-SMI HW diagram is as below:
EMI
|
M4U
|
------------
SMI Common
------------
|
+-------+------+------+----------------------+-------+
| | | | ...... | |
| | | | | |
larb0 larb1 larb2 larb4 ...... larb19 larb20
disp0 disp1 mdp vdec IPE IPE
All the connections are HW fixed, SW can NOT adjust it.
Comparing with the preview SoC, this patchset also adds two functions:
a) add iova 34 bits support.
b) add multi domains support since several HW has the special iova
region requirement.
this patchset depend on v5.8-rc1 and mt6779 iommu[1].
[1]https://lore.kernel.org/linux-iommu/20200703044127.27438-1-chao.hao@mediatek.com/
Yong Wu (21):
dt-binding: memory: mediatek: Add a common larb-port header file
dt-binding: memory: mediatek: Extend LARB_NR_MAX to 32
dt-binding: memory: mediatek: Add domain definition
dt-binding: mediatek: Add binding for mt8192 IOMMU and SMI
iommu/mediatek: Use the common mtk-smi-larb-port.h
iommu/io-pgtable-arm-v7s: Use ias to check the valid iova in unmap
iommu/io-pgtable-arm-v7s: Extend PA34 for MediaTek
iommu/io-pgtable-arm-v7s: Add cfg as a param in some macros
iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek
iommu/mediatek: Add device link for smi-common and m4u
iommu/mediatek: Add power-domain operation
iommu/mediatek: Add iova reserved function
iommu/mediatek: Make MTK_IOMMU depend on ARM64
iommu/mediatek: Add single domain
iommu/mediatek: Support master use iova over 32bit
iommu/mediatek: Support up to 34bit iova in tlb invalid
iommu/mediatek: Support report iova 34bit translation fault in ISR
iommu/mediatek: Add support for multi domain
iommu/mediatek: Adjust the structure
iommu/mediatek: Add mt8192 support
memory: mtk-smi: Add mt8192 support
.../bindings/iommu/mediatek,iommu.txt | 8 +-
.../mediatek,smi-common.txt | 5 +-
.../memory-controllers/mediatek,smi-larb.txt | 3 +-
drivers/iommu/Kconfig | 1 +
drivers/iommu/io-pgtable-arm-v7s.c | 51 ++--
drivers/iommu/mtk_iommu.c | 265 +++++++++++++++---
drivers/iommu/mtk_iommu.h | 11 +-
drivers/memory/mtk-smi.c | 25 ++
include/dt-bindings/memory/mt2712-larb-port.h | 2 +-
include/dt-bindings/memory/mt6779-larb-port.h | 2 +-
include/dt-bindings/memory/mt8173-larb-port.h | 2 +-
include/dt-bindings/memory/mt8183-larb-port.h | 2 +-
include/dt-bindings/memory/mt8192-larb-port.h | 237 ++++++++++++++++
.../dt-bindings/memory/mtk-smi-larb-port.h | 22 ++
include/linux/io-pgtable.h | 4 +-
include/soc/mediatek/smi.h | 3 +-
16 files changed, 565 insertions(+), 78 deletions(-)
create mode 100644 include/dt-bindings/memory/mt8192-larb-port.h
create mode 100644 include/dt-bindings/memory/mtk-smi-larb-port.h
--
2.18.0
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