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Message-ID: <20200713184101.GA516614@bogus>
Date: Mon, 13 Jul 2020 12:41:01 -0600
From: Rob Herring <robh@...nel.org>
To: Lars Povlsen <lars.povlsen@...rochip.com>
Cc: devicetree@...r.kernel.org, linux-clk@...r.kernel.org,
Alexandre Belloni <alexandre.belloni@...tlin.com>,
Microchip Linux Driver Support <UNGLinuxDriver@...rochip.com>,
linux-kernel@...r.kernel.org, linux-gpio@...r.kernel.org,
Rob Herring <robh+dt@...nel.org>, SoC Team <soc@...nel.org>,
linux-arm-kernel@...ts.infradead.org,
Olof Johansson <olof@...om.net>,
Linus Walleij <linus.walleij@...aro.org>,
Michael Turquette <mturquette@...libre.com>,
Steen Hegelund <Steen.Hegelund@...rochip.com>,
Arnd Bergmann <arnd@...db.de>, Stephen Boyd <sboyd@...nel.org>
Subject: Re: [PATCH v3 06/10] dt-bindings: clock: sparx5: Add Sparx5 SoC DPLL
clock
On Mon, 15 Jun 2020 15:32:38 +0200, Lars Povlsen wrote:
> This add the DT bindings documentation for the Sparx5 SoC DPLL clock
>
> Reviewed-by: Alexandre Belloni <alexandre.belloni@...tlin.com>
> Signed-off-by: Lars Povlsen <lars.povlsen@...rochip.com>
> ---
> .../bindings/clock/microchip,sparx5-dpll.yaml | 52 +++++++++++++++++++
> 1 file changed, 52 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml
>
Reviewed-by: Rob Herring <robh@...nel.org>
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