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Message-Id: <1594614896-16606-1-git-send-email-yilun.xu@intel.com>
Date: Mon, 13 Jul 2020 12:34:54 +0800
From: Xu Yilun <yilun.xu@...el.com>
To: lee.jones@...aro.org, linux-kernel@...r.kernel.org
Cc: trix@...hat.com, yilun.xu@...el.com,
matthew.gerlach@...ux.intel.com, russell.h.weight@...el.com,
lgoncalv@...hat.com
Subject: [PATCH 0/2] add Intel Max10 BMC chip support
This patchset add basic functions for Intel Max10 BMC chip.
Patch #1 implements the main feature.
Patch #2 is a fix for the HW issue lies in the "SPI Slave to Avalon Master
bridge" IP block, which is used for communication between host and the BMC
chip.
Matthew Gerlach (1):
mfd: intel-m10-bmc: start with the last SOP on phy rx buffer parsing
Xu Yilun (1):
mfd: intel-m10-bmc: add Max10 BMC chip support for Intel FPGA PAC
.../ABI/testing/sysfs-driver-intel-m10-bmc | 15 +
drivers/mfd/Kconfig | 13 +
drivers/mfd/Makefile | 3 +
drivers/mfd/intel-m10-bmc-main.c | 176 ++++
drivers/mfd/intel-spi-avmm.c | 904 +++++++++++++++++++++
drivers/mfd/intel-spi-avmm.h | 35 +
include/linux/mfd/intel-m10-bmc.h | 57 ++
7 files changed, 1203 insertions(+)
create mode 100644 Documentation/ABI/testing/sysfs-driver-intel-m10-bmc
create mode 100644 drivers/mfd/intel-m10-bmc-main.c
create mode 100644 drivers/mfd/intel-spi-avmm.c
create mode 100644 drivers/mfd/intel-spi-avmm.h
create mode 100644 include/linux/mfd/intel-m10-bmc.h
--
2.7.4
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