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Message-ID: <OF489B498F.FD7A0610-ON482585A4.001F9CFA-482585A4.001FDC15@mxic.com.tw>
Date: Mon, 13 Jul 2020 13:47:59 +0800
From: masonccyang@...c.com.tw
To: ycllin@...c.com.tw
Cc: boris.brezillon@...labora.com, broonie@...nel.org,
juliensu@...c.com.tw, linux-kernel@...r.kernel.org,
linux-mtd@...ts.infradead.org, linux-spi@...r.kernel.org,
matthias.bgg@...il.com, miquel.raynal@...tlin.com, p.yadav@...com,
richard@....at, tudor.ambarus@...rochip.com, vigneshr@...com
Subject: Re: [PATCH v4 0/7] mtd: spi-nor: add xSPI Octal DTR support
+ YC Lin in loop,
YC(ycllin@...c.com.tw)will take over this patch set.
> Subject
>
> [PATCH v4 0/7] mtd: spi-nor: add xSPI Octal DTR support
>
> Hello,
>
> JESD216C has defined specification for Octal 8S-8S-8S and 8D-8D-8D.
> Based on JEDEC216C Basic Flash Parameter Table (BFPT) driver extract
> DWORD-18: command and command extension type.
> DWORD-20: Maximum operation speed of device in Octal mode.
>
> xSPI profile 1.0 table:
> DWORD-1: Read Fast command, the number of dummy cycles and address
nbytes
> for Read Status Register command.
> DWORD-2: Read/Write volatile Register command for CFG Reg2.
> DWORD-4 and DWORD-5: dummy cycles used for various frequencies based on
> maximum speed of device from BFPT 20th DWORD.
>
> Ccommand sequences to change to octal DTR mode:
> The length of each command sequence is 8 per byte for single SPI mode
and
> patching driver to parse and execute these sequences for octal DTR mode.
>
> By Vignesh's comments, this patches set is dependency on Pratyush's
> [1][2][5][7][8] and [10][12].
>
> Tested on Macronix's Zynq PicoZed board with Macronix's SPI controller
> (spi-mxic.c) driver patched on mx25uw51245g Octal flash.
>
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