linux-kernel - Re: [PATCH v4 4/7] mtd: spi-nor: core: add configuration register 2 read & write support

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Message-ID: <OFEB5FB2E6.05B846A9-ON482585A4.00209949-482585A4.0020AAF4@mxic.com.tw>
Date:   Mon, 13 Jul 2020 13:56:49 +0800
From:   masonccyang@...c.com.tw
To:     ycllin@...c.com.tw
Cc:     boris.brezillon@...labora.com, broonie@...nel.org,
        juliensu@...c.com.tw, linux-kernel@...r.kernel.org,
        linux-mtd@...ts.infradead.org, linux-spi@...r.kernel.org,
        matthias.bgg@...il.com, miquel.raynal@...tlin.com, p.yadav@...com,
        richard@....at, tudor.ambarus@...rochip.com, vigneshr@...com
Subject: Re: [PATCH v4 4/7] mtd: spi-nor: core: add configuration register 2 read & write
 support

+ YC Lin in loop,

--
> 
> Subject
> 
> [PATCH v4 4/7] mtd: spi-nor: core: add configuration register 2 read & 
write support
> 
> Configuration register 2 is to set the device operation condition like
> STR or DTR mode at address offset 0 and DQS mode at address offset 
0x200.
> 
> Each device has various address offset for it's specific operatoin
> setting.
> 
> Signed-off-by: Mason Yang <masonccyang@...c.com.tw>
> ---

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