lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <DB8PR02MB5468F9E41DA0EFA9FC1FB7C7D2600@DB8PR02MB5468.eurprd02.prod.outlook.com>
Date:   Mon, 13 Jul 2020 07:24:54 +0000
From:   Tomer Tayar <ttayar@...ana.ai>
To:     Oded Gabbay <oded.gabbay@...il.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        SW_Drivers <SW_Drivers@...ana.ai>
Subject: RE: [PATCH 1/4] habanalabs: halt device CPU only upon certain reset

On Fri, Jul 10, 2020 at 20:37 AM Oded Gabbay <oded.gabbay@...il.com> wrote:
> Currently the driver halts the device CPU in the halt engines function,
> which halts all the engines of the ASIC. The problem is that if later on we
> stop the reset process (due to inability to clean memory mappings in time),
> the CPU will remain in halt mode. This creates many issues, such as
> thermal/power control and FLR handling.
> 
> Therefore, move the halting of the device CPU to the very end of the reset
> process, just before writing to the registers to initiate the reset. In
> addition, the driver now needs to send a message to the device F/W to
> disable it from sending interrupts to the host machine because during halt
> engines function the driver disables the MSI/MSI-X interrupts.
> 
> Signed-off-by: Oded Gabbay <oded.gabbay@...il.com>

Reviewed-by: Tomer Tayar <ttayar@...ana.ai>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ