linux-kernel - RE: [PATCH v3] scsi: ufs-mediatek: Add inline encryption support

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Message-ID: <SN6PR04MB4640380F541EBDD2F5BC434EFC600@SN6PR04MB4640.namprd04.prod.outlook.com>
Date:   Mon, 13 Jul 2020 08:18:29 +0000
From:   Avri Altman <Avri.Altman@....com>
To:     Stanley Chu <stanley.chu@...iatek.com>,
        "linux-scsi@...r.kernel.org" <linux-scsi@...r.kernel.org>,
        "martin.petersen@...cle.com" <martin.petersen@...cle.com>,
        "alim.akhtar@...sung.com" <alim.akhtar@...sung.com>,
        "jejb@...ux.ibm.com" <jejb@...ux.ibm.com>,
        "ebiggers@...nel.org" <ebiggers@...nel.org>,
        "satyat@...gle.com" <satyat@...gle.com>
CC:     "matthias.bgg@...il.com" <matthias.bgg@...il.com>,
        "linux-mediatek@...ts.infradead.org" 
        <linux-mediatek@...ts.infradead.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "kuohong.wang@...iatek.com" <kuohong.wang@...iatek.com>,
        "peter.wang@...iatek.com" <peter.wang@...iatek.com>,
        "chun-hung.wu@...iatek.com" <chun-hung.wu@...iatek.com>,
        "andy.teng@...iatek.com" <andy.teng@...iatek.com>,
        "chaotian.jing@...iatek.com" <chaotian.jing@...iatek.com>,
        "cc.chou@...iatek.com" <cc.chou@...iatek.com>
Subject: RE: [PATCH v3] scsi: ufs-mediatek: Add inline encryption support

 
> 
> Add inline encryption support to ufs-mediatek.
> 
> The standards-compliant parts, such as querying the crypto capabilities
> and enabling crypto for individual UFS requests, are already handled by
> ufshcd-crypto.c, which itself is wired into the blk-crypto framework.
> 
> However MediaTek UFS host requires a vendor-specific hce_enable operation
> to allow crypto-related registers being accessed normally in kernel.
> After this step, MediaTek UFS host can work as standard-compliant host
> for inline-encryption related functions.
> 
> Signed-off-by: Stanley Chu <stanley.chu@...iatek.com>
Reviewed-by: Avri Altman <avri.altman@....com>

> ---
>  drivers/scsi/ufs/ufs-mediatek.c | 22 ++++++++++++++++++++++
>  drivers/scsi/ufs/ufs-mediatek.h |  1 +
>  2 files changed, 23 insertions(+)
> 
> diff --git a/drivers/scsi/ufs/ufs-mediatek.c b/drivers/scsi/ufs/ufs-mediatek.c
> index ad929235c193..31af8b3d2b53 100644
> --- a/drivers/scsi/ufs/ufs-mediatek.c
> +++ b/drivers/scsi/ufs/ufs-mediatek.c
> @@ -16,6 +16,7 @@
>  #include <linux/soc/mediatek/mtk_sip_svc.h>
> 
>  #include "ufshcd.h"
> +#include "ufshcd-crypto.h"
>  #include "ufshcd-pltfrm.h"
>  #include "ufs_quirks.h"
>  #include "unipro.h"
> @@ -25,6 +26,9 @@
>         arm_smccc_smc(MTK_SIP_UFS_CONTROL, \
>                       cmd, val, 0, 0, 0, 0, 0, &(res))
> 
> +#define ufs_mtk_crypto_ctrl(res, enable) \
> +       ufs_mtk_smc(UFS_MTK_SIP_CRYPTO_CTRL, enable, res)
> +
>  #define ufs_mtk_ref_clk_notify(on, res) \
>         ufs_mtk_smc(UFS_MTK_SIP_REF_CLK_NOTIFICATION, on, res)
> 
> @@ -73,6 +77,18 @@ static void ufs_mtk_cfg_unipro_cg(struct ufs_hba *hba,
> bool enable)
>         }
>  }
> 
> +static void ufs_mtk_crypto_enable(struct ufs_hba *hba)
> +{
> +       struct arm_smccc_res res;
> +
> +       ufs_mtk_crypto_ctrl(res, 1);
> +       if (res.a0) {
> +               dev_info(hba->dev, "%s: crypto enable failed, err: %lu\n",
> +                        __func__, res.a0);
> +               hba->caps &= ~UFSHCD_CAP_CRYPTO;
> +       }
> +}
> +
>  static int ufs_mtk_hce_enable_notify(struct ufs_hba *hba,
>                                      enum ufs_notify_change_status status)
>  {
> @@ -83,6 +99,9 @@ static int ufs_mtk_hce_enable_notify(struct ufs_hba
> *hba,
>                         hba->vps->hba_enable_delay_us = 0;
>                 else
>                         hba->vps->hba_enable_delay_us = 600;
> +
> +               if (hba->caps & UFSHCD_CAP_CRYPTO)
> +                       ufs_mtk_crypto_enable(hba);
>         }
> 
>         return 0;
> @@ -317,6 +336,9 @@ static int ufs_mtk_init(struct ufs_hba *hba)
>         /* Enable clock-gating */
>         hba->caps |= UFSHCD_CAP_CLK_GATING;
> 
> +       /* Enable inline encryption */
> +       hba->caps |= UFSHCD_CAP_CRYPTO;
> +
>         /* Enable WriteBooster */
>         hba->caps |= UFSHCD_CAP_WB_EN;
>         hba->vps->wb_flush_threshold = UFS_WB_BUF_REMAIN_PERCENT(80);
> diff --git a/drivers/scsi/ufs/ufs-mediatek.h b/drivers/scsi/ufs/ufs-mediatek.h
> index 6052ec105aba..8ed24d5fcff9 100644
> --- a/drivers/scsi/ufs/ufs-mediatek.h
> +++ b/drivers/scsi/ufs/ufs-mediatek.h
> @@ -70,6 +70,7 @@ enum {
>   */
>  #define MTK_SIP_UFS_CONTROL               MTK_SIP_SMC_CMD(0x276)
>  #define UFS_MTK_SIP_DEVICE_RESET          BIT(1)
> +#define UFS_MTK_SIP_CRYPTO_CTRL           BIT(2)
>  #define UFS_MTK_SIP_REF_CLK_NOTIFICATION  BIT(3)
> 
>  /*
> --
> 2.18.0