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Message-ID: <20200713091708.GC3500@dell>
Date: Mon, 13 Jul 2020 10:17:08 +0100
From: Lee Jones <lee.jones@...aro.org>
To: Xu Yilun <yilun.xu@...el.com>
Cc: linux-kernel@...r.kernel.org, trix@...hat.com,
matthew.gerlach@...ux.intel.com, russell.h.weight@...el.com,
lgoncalv@...hat.com, Wu Hao <hao.wu@...el.com>
Subject: Re: [PATCH 1/2] mfd: intel-m10-bmc: add Max10 BMC chip support for
Intel FPGA PAC
On Mon, 13 Jul 2020, Xu Yilun wrote:
> This patch implements the basic functions of the BMC chip for some Intel
> FPGA PCIe Acceleration Cards (PAC). The BMC is implemented using the
> intel max10 CPLD.
>
> This BMC chip is connected to FPGA by a SPI bus. To provide reliable
> register access from FPGA, an Avalon Memory-Mapped (Avmm) transaction
> protocol over the SPI bus is used between host and slave.
>
> This driver implements the basic register access with the regmap framework.
> The mfd cells array is empty now as a placeholder.
>
> Signed-off-by: Xu Yilun <yilun.xu@...el.com>
> Signed-off-by: Wu Hao <hao.wu@...el.com>
> Signed-off-by: Matthew Gerlach <matthew.gerlach@...ux.intel.com>
> Signed-off-by: Russ Weight <russell.h.weight@...el.com>
> Signed-off-by: Tom Rix <trix@...hat.com>
> ---
> .../ABI/testing/sysfs-driver-intel-m10-bmc | 15 +
> drivers/mfd/Kconfig | 13 +
> drivers/mfd/Makefile | 3 +
> drivers/mfd/intel-m10-bmc-main.c | 176 ++++
> drivers/mfd/intel-spi-avmm.c | 904 +++++++++++++++++++++
This does not belong in MFD.
Please consider moving it to drivers/spi.
> drivers/mfd/intel-spi-avmm.h | 35 +
> include/linux/mfd/intel-m10-bmc.h | 57 ++
> 7 files changed, 1203 insertions(+)
> create mode 100644 Documentation/ABI/testing/sysfs-driver-intel-m10-bmc
> create mode 100644 drivers/mfd/intel-m10-bmc-main.c
> create mode 100644 drivers/mfd/intel-spi-avmm.c
> create mode 100644 drivers/mfd/intel-spi-avmm.h
> create mode 100644 include/linux/mfd/intel-m10-bmc.h
--
Lee Jones [李琼斯]
Senior Technical Lead - Developer Services
Linaro.org │ Open source software for Arm SoCs
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