linux-kernel - Re: [Freedreno] [v1] drm/msm/dpu: enumerate second cursor pipe for external interface

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Message-ID: <CAF6AEGvhVLY=2d7Qbp2qXmLX-ywtN1jkydhHkVesREF3ffRjYA@mail.gmail.com>
Date:   Mon, 13 Jul 2020 07:14:42 -0700
From:   Rob Clark <robdclark@...il.com>
To:     Kalyan Thota <kalyan_t@...eaurora.org>
Cc:     "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        Krishna Manikandan <mkrishn@...eaurora.org>,
        linux-arm-msm <linux-arm-msm@...r.kernel.org>,
        Raviteja Tamatam <travitej@...eaurora.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        dri-devel <dri-devel@...ts.freedesktop.org>,
        Douglas Anderson <dianders@...omium.org>,
        nganji@...eaurora.org, Sean Paul <seanpaul@...omium.org>,
        "Kristian H. Kristensen" <hoegsberg@...omium.org>,
        Stephen Boyd <swboyd@...omium.org>,
        freedreno <freedreno@...ts.freedesktop.org>
Subject: Re: [Freedreno] [v1] drm/msm/dpu: enumerate second cursor pipe for
 external interface

On Mon, Jul 13, 2020 at 3:18 AM <kalyan_t@...eaurora.org> wrote:
>
> On 2020-07-10 22:19, Rob Clark wrote:
> > On Thu, Jun 25, 2020 at 5:46 AM Kalyan Thota <kalyan_t@...eaurora.org>
> > wrote:
> >>
> >> Setup an RGB HW pipe as cursor which can be used on
> >> secondary interface.
> >>
> >> For SC7180 2 HW pipes are enumerated as cursors
> >> 1 - primary interface
> >> 2 - secondary interface
> >>
> >> Signed-off-by: Kalyan Thota <kalyan_t@...eaurora.org>
> >> ---
> >>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 12 ++++++------
> >>  1 file changed, 6 insertions(+), 6 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> >> b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> >> index 8f2357d..23061fd 100644
> >> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> >> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> >> @@ -117,10 +117,10 @@
> >>                 .reg_off = 0x2AC, .bit_off = 0},
> >>         .clk_ctrls[DPU_CLK_CTRL_DMA0] = {
> >>                 .reg_off = 0x2AC, .bit_off = 8},
> >> -       .clk_ctrls[DPU_CLK_CTRL_DMA1] = {
> >> -               .reg_off = 0x2B4, .bit_off = 8},
> >>         .clk_ctrls[DPU_CLK_CTRL_CURSOR0] = {
> >> -               .reg_off = 0x2BC, .bit_off = 8},
> >> +               .reg_off = 0x2B4, .bit_off = 8},
> >> +       .clk_ctrls[DPU_CLK_CTRL_CURSOR1] = {
> >> +               .reg_off = 0x2C4, .bit_off = 8},
> >
> > It looks like you shifted the register offset here from 0x2bc to
> > 0x2c4, was that intentional?
> >
> > BR,
> > -R
> Yes Rob, the offset was wrong which i corrected in this patch.


Thanks for confirming.  In the future, it would have been useful to
mention that in the commit msg.

BR,
-R