linux-kernel - Re: [PATCH 4/6] interconnect: qcom: Add SM8250 interconnect provider driver

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Message-ID: <25c59c3e-e085-e940-e3fd-bb367d1438d2@linaro.org>
Date:   Mon, 13 Jul 2020 17:19:11 +0300
From:   Georgi Djakov <georgi.djakov@...aro.org>
To:     Jonathan Marek <jonathan@...ek.ca>, linux-arm-msm@...r.kernel.org
Cc:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        linux-kernel@...r.kernel.org, linux-pm@...r.kernel.org
Subject: Re: [PATCH 4/6] interconnect: qcom: Add SM8250 interconnect provider
 driver

On 7/13/20 16:47, Jonathan Marek wrote:
> On 7/13/20 9:30 AM, Georgi Djakov wrote:
>> Hi Jonathan,
>>
>> Thanks for posting these patches!
>>
>> On 7/1/20 16:42, Jonathan Marek wrote:
>>> Add driver for the Qualcomm interconnect buses found in SM8250 based
>>> platforms. The topology consists of several NoCs that are controlled by
>>> a remote processor that collects the aggregated bandwidth for each
>>> master-slave pairs.
>>>
>>> Based on SC7180 driver and generated from downstream dts.
>>>
>>> Signed-off-by: Jonathan Marek <jonathan@...ek.ca>
>>> ---
>> [..]
>>> +
>>> +static const struct of_device_id qnoc_of_match[] = {
>>> +    { .compatible = "qcom,sm8250-aggre1-noc",
>>> +      .data = &sm8250_aggre1_noc},
>>> +    { .compatible = "qcom,sm8250-aggre2-noc",
>>> +      .data = &sm8250_aggre2_noc},
>>> +    { .compatible = "qcom,sm8250-compute-noc",
>>> +      .data = &sm8250_compute_noc},
>>> +    { .compatible = "qcom,sm8250-config-noc",
>>> +      .data = &sm8250_config_noc},
>>> +    { .compatible = "qcom,sm8250-dc-noc",
>>> +      .data = &sm8250_dc_noc},
>>> +    { .compatible = "qcom,sm8250-gem-noc",
>>> +      .data = &sm8250_gem_noc},
>>> +    { .compatible = "qcom,sm8250-ipa-virt",
>>> +      .data = &sm8250_ipa_virt},
>>> +    { .compatible = "qcom,sm8250-mc-virt",
>>> +      .data = &sm8250_mc_virt},
>>> +    { .compatible = "qcom,sm8250-mmss-noc",
>>> +      .data = &sm8250_mmss_noc},
>>> +    { .compatible = "qcom,sm8250-npu-noc",
>>> +      .data = &sm8250_npu_noc},
>>> +    { .compatible = "qcom,sm8250-system-noc",
>>> +      .data = &sm8250_system_noc},
>>> +    { .compatible = "qcom,sm8250-gem-noc-display",
>>> +      .data = &sm8250_gem_noc_display},
>>> +    { .compatible = "qcom,sm8250-mc-virt-display",
>>> +      .data = &sm8250_mc_virt_display},
>>> +    { .compatible = "qcom,sm8250-mmss-noc-display",
>>> +      .data = &sm8250_mmss_noc_display},
>>> +    { }
>>
>> My main concern here are the display RSC nodes. We should not add the nodes
>> for voting on the display RSC, but use the "qcom,bcm-voters" property in DT
>> to list both "hlos" and "disp" as bcm voters for gem-noc, mc-virt and
>> mmss-noc.
>>
> 
> Would it be OK to just drop the display RSC parts from this series then? Not
> sure if anything needs it to work, but I'm not using it currently.

This would be perfect! Let's start without the display bits. Reviewing and
testing the display part would be also a bit tricky for me.

> Though if you can provide details for a solution, I could implement it
> (qcom_icc_provider needs to have a list of voters, but I'm not sure how to deal
> with everything else).

Yes, exactly. The idea is to add voters to each qcom_icc_desc and then "get"
the voters and commit for each of them. But i think there is a patch for this
already, let me check about whether its going upstream anytime soon.

Thanks,
Georgi