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Message-ID: <CAPTRvHm0gX=myLBeztq-7q8hMGZ+a0pH_ZB8hH+RZtSSsqVGDw@mail.gmail.com>
Date: Tue, 14 Jul 2020 11:37:30 +0800
From: Hua Dillon <dillonhua@...il.com>
To: Adrian Pop <pop.adrian61@...il.com>
Cc: Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...com>,
Rob Herring <robh+dt@...nel.org>,
Lee Jones <lee.jones@...aro.org>, devicetree@...r.kernel.org,
linux-stm32@...md-mailman.stormreply.com,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 2/2] ARM: dts: stm32: Enable MIPI DSI display support.
Hi, Adrian,
Just one suggestion for you.
Adrian Pop <pop.adrian61@...il.com> 于2020年7月3日周五 上午1:30写道:
>
> STM32f769-disco features a 4" MIPI DSI display: add support for it.
> On Cortex-M7 DMA can't use cached memory. For this reason I use a dedicated
> memory pool for DMA with no-cache attribute which is located at the end of
> RAM.
>
> Signed-off-by: Adrian Pop <pop.adrian61@...il.com>
> ---
> arch/arm/boot/dts/stm32f746.dtsi | 34 +++++++++++++++++++
> arch/arm/boot/dts/stm32f769-disco.dts | 49 +++++++++++++++++++++++++++
> 2 files changed, 83 insertions(+)
>
> diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
> index 93c063796780..577a812ca01c 100644
> --- a/arch/arm/boot/dts/stm32f746.dtsi
> +++ b/arch/arm/boot/dts/stm32f746.dtsi
> @@ -48,6 +48,19 @@ / {
> #address-cells = <1>;
> #size-cells = <1>;
>
> + reserved-memory {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + linux,dma {
> + compatible = "shared-dma-pool";
> + linux,dma-default;
> + no-map;
> + reg = <0xc0f00000 0x100000>;
> + };
> + };
> +
Christoph Hellwig was submit a patch for !CONFIG_MMU platforms to support mmap.
the patch is : 1fbf57d05302 dma-direct: re-enable mmap for !CONFIG_MMU
i thought there is no need to create a reserved-memory for it.
> clocks {
> clk_hse: clk-hse {
> #clock-cells = <0>;
> @@ -75,6 +88,27 @@ clk_i2s_ckin: clk-i2s-ckin {
> };
>
> soc {
> + ltdc: display-controller@...16800 {
> + compatible = "st,stm32-ltdc";
> + reg = <0x40016800 0x200>;
> + interrupts = <88>, <89>;
> + resets = <&rcc STM32F7_APB2_RESET(LTDC)>;
> + clocks = <&rcc 1 CLK_LCD>;
> + clock-names = "lcd";
> + status = "disabled";
> + };
> +
> + dsi: dsi@...16c00 {
> + compatible = "st,stm32-dsi";
> + reg = <0x40016c00 0x800>;
> + interrupts = <98>;
> + clocks = <&rcc 1 CLK_F769_DSI>, <&clk_hse>;
> + clock-names = "pclk", "ref";
> + resets = <&rcc STM32F7_APB2_RESET(DSI)>;
> + reset-names = "apb";
> + status = "disabled";
> + };
> +
> timer2: timer@...00000 {
> compatible = "st,stm32-timer";
> reg = <0x40000000 0x400>;
> diff --git a/arch/arm/boot/dts/stm32f769-disco.dts b/arch/arm/boot/dts/stm32f769-disco.dts
> index 1626e00bb2cb..a9e81b49809c 100644
> --- a/arch/arm/boot/dts/stm32f769-disco.dts
> +++ b/arch/arm/boot/dts/stm32f769-disco.dts
> @@ -153,3 +153,52 @@ &usbotg_hs {
> pinctrl-names = "default";
> status = "okay";
> };
> +
> +&dsi {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + dsi_in: endpoint {
> + remote-endpoint = <<dc_out_dsi>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + dsi_out: endpoint {
> + remote-endpoint = <&dsi_in_panel>;
> + };
> + };
> +
> + };
> +
> + panel: panel {
> + compatible = "orisetech,otm8009a";
> + reg = <0>;
> + reset-gpios = <&gpioj 15 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +
> + port {
> + dsi_in_panel: endpoint {
> + remote-endpoint = <&dsi_out>;
> + };
> + };
> + };
> +};
> +
> +<dc {
> + status = "okay";
> +
> + port {
> + ltdc_out_dsi: endpoint {
> + remote-endpoint = <&dsi_in>;
> + };
> + };
> +};
> --
> 2.27.0
>
>
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