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Message-ID: <142a1e77-d5aa-40d1-6083-1f438a426b7b@loongson.cn>
Date:   Tue, 14 Jul 2020 09:39:52 +0800
From:   Tiezhu Yang <yangtiezhu@...ngson.cn>
To:     Rob Herring <robh@...nel.org>
Cc:     Thomas Gleixner <tglx@...utronix.de>,
        Jason Cooper <jason@...edaemon.net>,
        Marc Zyngier <maz@...nel.org>, linux-kernel@...r.kernel.org,
        Jiaxun Yang <jiaxun.yang@...goat.com>,
        devicetree@...r.kernel.org
Subject: Re: [PATCH v3 8/8] dt-bindings: interrupt-controller: Fix typos in
 loongson,liointc.yaml

On 07/14/2020 05:41 AM, Rob Herring wrote:
> On Tue, Jul 07, 2020 at 10:12:52AM +0800, Tiezhu Yang wrote:
>> Fix the following two typos in loongson,liointc.yaml:
>> fron -> from
>> connected -> connect
>> it's -> its
>>
>> Fixes: b6280c8bb6f5 ("dt-bindings: interrupt-controller: Add Loongson LIOINTC")
>> Signed-off-by: Tiezhu Yang <yangtiezhu@...ngson.cn>
>> Cc: Rob Herring <robh+dt@...nel.org>
>> Cc: devicetree@...r.kernel.org
>> ---
>>   .../devicetree/bindings/interrupt-controller/loongson,liointc.yaml    | 4 ++--
>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
>> index b1db21e..732ad9a 100644
>> --- a/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
>> +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
>> @@ -51,8 +51,8 @@ properties:
>>       description: |
>>         This property points how the children interrupts will be mapped into CPU
>>         interrupt lines. Each cell refers to a parent interrupt line from 0 to 3
>> -      and each bit in the cell refers to a children interrupt fron 0 to 31.
>> -      If a CPU interrupt line didn't connected with liointc, then keep it's
>> +      and each bit in the cell refers to a children interrupt from 0 to 31.
> While at it, s/children/child/

Hi,

Since the other patches of this series have no changes and they belong to
different subsystem which are independent, could I only send v4 of this
patch separately?

Thanks,
Tiezhu

>
>> +      If a CPU interrupt line didn't connect with liointc, then keep its
>>         cell with zero.
>>       $ref: /schemas/types.yaml#/definitions/uint32-array
>>       minItems: 4
>> -- 
>> 2.1.0
>>

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